ST92R195B
ROMLESS HCMOS MCU WITH
ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER
DATA BRIEFING
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
Register File based 8/16 bit Core Architecture
with RUN, WFI, SLOW and HALT modes
0擄C to +70擄C Operating Temperature Range
available
Up to 24 MHz Operation @ 5V鹵10%
Minimum instruction cycle time: 375ns at
16 MHz internal clock
4 Mbytes address space
256 Bytes RAM of Register file (accumulators or
index registers)
1024 Bytes of on-chip static RAM
8K Bytes of TDSRAM (Teletext and Display
Storage RAM)
80-lead QFP package
23 fully programmable I/O pins
Serial Peripheral Interface
Flexible Clock controller for OSD, Data Slicer
and Core clocks running from one single low
frequency external crystal.
Enhanced Display Controller with 26 rows of
40/80 characters
鈥?Serial and Parallel attributes
鈥?10x10 dot Matrix, 512 ROM characters, defin-
able by user
鈥?4/3 and 16/9 supported in 50/60Hz and 100/
120 Hz mode
鈥?Rounding, fringe, double width, double height,
scrolling, cursor, full background color, half-
intensity color, translucency and half-tone
modes
Teletext unit, including Data slicer, Acquisition
Unit and 8 Kbytes TDSRAM for Data Storage
VPS and Wide Screen Signalling slicer
Integrated Sync Extractor and Sync Controller
14-bit Voltage Synthesis for tuning reference
voltage
Up to 8 External Interrupts plus 1 non-maskable
interrupt
QFP80
8 x 8-bit programmable PWM outputs with 5V
open-drain or push-pull capability
s
16-bit Watchdog timer with 8-bit prescaler
s
One 16-bit standard timer with 8-bit prescaler
s
4-channel
Analog-to-Digital converter; 5-bit
guaranteed
s
Rich instruction set and 14-Addressing modes
Versatile Development Tools, including Assem-
bler, Linker, C-compiler, Archiver, Source Level
Debugger and Hardware Emulators with Real-
Time Operating System available from third par-
ties
s
Device Summary
Device
ST92R195B9
Program
Memory
ROMLESS
TDS VPS/
RAM WSS
8K
Yes
Package
PQFP80
Rev. 2.2
January 2000
1/18
1