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ST9293J3 Datasheet

  • ST9293J3

  • 48K ROM HCMOS MCUs WITH ON SCREEN DISPLAY AND A/D CONVERTER

  • 4頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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ST9293
48K ROM HCMOS MCUs WITH
ON SCREEN DISPLAY AND A/D CONVERTER
FUNCTIONAL DESCRIPTION
Register oriented 8/16 bit CORE with
RUN, WFI and HALT modes
Minimum instruction cycle time: 500ns
(12MHz internal)
16 to 48K bytes of ROM,
256 to 768 bytes of RAM,
224 general purpose registers available as RAM,
accumulators or index registers (Register File)
42-lead Shrink DIP package
Interrupt handler and Serial Peripheral Interface
as standard features
31 fully programmable I/O pins
34 character x15 rows software programmable
On Screen Display module with colour, italic, un-
derline, flash, transparent and fringe attribute
options
16 bit Timer with 8 bit Prescaler, able to be used
as a Watchdog Timer
16-bit programmable Slice Timer with 8-bit pres-
caler
4 channel Analog to Digital Converter, with inte-
gral sample and hold, fast 5.75碌s conversion
time, 6-bit guaranteed resolution
Rich Instruction Set and 14 Addressing modes
Division-by-Zero trap generation
Versatile Development tools, including assembler,
linker, C-compiler, archiver, graphic oriented de-
bugger and hardware emulators
Real Time Operating System
Windowed EPROM parts available for prototyp-
ing and pre-production development phases
(Ordering Information at the end of the Datasheet)
PSDIP42
DEVICE SUMMARY
Device
ST9293J7
ST9293J5
ST9293J3
ST9293J1
ROM
48K
32K
24K
16K
RAM
768
640
512
256
PACKAGE
PSDIP42
PSDIP42
PSDIP42
PSDIP42
May 1993
This is Preliminary Data from SGS-THOMSON. Details are subject to change without notice.
1/4

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