鈻?/div>
Enhanced 8/16-bit CPU core with 16 Mbytes
linear addressable memory
112 Kbytes of User ROM
4 Kbytes of RAM
36 Kbytes of EEPROM including 64 bytes User
OTP area
High integrated analog front end (AFE) for RF
transmission and reception including automatic
card and field detection modes
Three 8-bit timers with interrupt capability
Battery Off and Battery Low modes supported
in Card Emulation mode
Optimized power consumption modes
SIM and ST21NFCA power management
functions
True random number generator
鈻?/div>
ISO/IEC 3309 CRC calculation block
鈻?/div>
Unique serial number on each die
鈻?/div>
Hardware DES accelerator
Electrical characteristics
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
Standby current: < 75 碌A(chǔ) (typ.)
Card emulation: < 8 mA in normal mode
Standby current for Reader mode: ~200 碌A(chǔ) in
Card Detection mode
Reader mode: < 70 mA (typ.)
3V power supply
Supports Class B and C for UICC
Software features
鈻?/div>
RF communications
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
ISO/IEC 14443 A&B
ISO/IEC 15693
ISO/IEC 18000-3 Mod1
ECMA340 (NFCIP-1)
Supports FeliCa鈩?cards as described in
ECMA340 specification
All RF communications are available in card
and reader modes
Includes all drivers supporting the handling and
host protocols for contact and contactless
interfaces
鈻?/div>
Includes complete firmware driving switch
modes between operating modes and host
controller interface functions (HCI)
Validation tools
An evaluation and debugging board is available
for complete integration.
Communication interfaces
鈻?/div>
鈻?/div>
Single Wire Protocol (SWP) interface
I
2
C Slave interface
鈻?/div>
SPI Slave interface
鈻?/div>
Asynchronous receiver transmitter ISO/IEC
7816-3 master interface supporting T=0 and
T=1 protocols
February 2008
Rev 1
1/6
www.st.com
6
For further information contact your local STMicroelectronics sales office.
ST21NFCA相關(guān)型號(hào)PDF文件下載
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英文版
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