ST18952
DIGITAL SIGNAL PROCESSOR (DSP) CHIP
PRELIMINARY DATA
s
s
s
Programmable D950 Core
s
Data calculation unit
s
Address calculation unit
s
Program control unit
s
Fast and flexible buses
s
66MIPS - 15 ns instruction cycle time
16.5 Kwords data memory (RAM)
32 Kwords program memory (RA42 1714 01)
s
Interrupt controller
s
DMA controller
s
Serial input/output
s
Timer
s
Bus switch unit
s
Emulation unit
s
JTAG IEEE 1149.1 test access port
TAP
16.5 Kwords
data memory
Emulation
unit
D950
core
32 Kwords
program
memory
2
Timers
Bus switch
unit
2
Serial I/O
Interrupt
controller
DMA
controller
12 January 98
The information in this datasheet is subject to change
42 1714 01
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