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ST16C2550_04 Datasheet

  • ST16C2550_04

  • 2.97V TO 5.5V DUART WITH 16-BYTE FIFO

  • 39頁

  • EXAR   EXAR

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xr
OCTOBER 2004
ST16C2550
2.97V TO 5.5V DUART WITH 16-BYTE FIFO
REV. 4.4.0
GENERAL DESCRIPTION
The ST16C2550 (C2550) is a dual universal
asynchronous receiver and transmitter (UART). The
ST16C2550 is an improved version of the PC16550
UART with higher operating speed and faster access
times. The C2550 provides enhanced UART
functions with 16 byte FIFO鈥檚, a modem control
interface, and data rates up to 4 Mbps. Onboard
status registers provide the user with error indications
and operational status. System interrupts and modem
control features may be tailored by external software
to meet specific user requirements. Independent
programmable baud rate generators are provided to
select transmit and receive clock rates from 50 bps to
4 Mbps. The Baud Rate Generator can be configured
for either crystal or external clock input. An internal
loopback capability allows onboard diagnostics. The
C2550 is available in a 44-pin PLCC and 48-pin
TQFP packages. The C2550 is fabricated in an
advanced CMOS process capable of operating from
2.97 volt to 5.5 volt power supply.
APPLICATIONS
FEATURES
Added feature in devices with top mark date code
of "A2 YYWW" and newer:
鈻?/div>
5 Volt Tolerant Inputs
鈥?/div>
Pin-to-pin compatible to Exar鈥檚 ST16C2450,
XR16L2550 and XR16L2750
鈥?/div>
Pin-to-pin compatible to TI鈥檚 TL16C752B on the 48-
TQFP package
鈥?/div>
Pin alike XR16C2850 48-TQFP package but
without CLK8/16, CLKSEL and HDCNTL inputs
鈥?/div>
2 independent UART channels
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈥?/div>
Portable Appliances
鈥?/div>
Telecommunication Network Routers
鈥?/div>
Ethernet Network Routers
鈥?/div>
Cellular Data Devices
鈥?/div>
Factory Automation and Process Controls
F
IGURE
1. ST16C2550 B
LOCK
D
IAGRAM
Up to 4 Mbps with external clock of 64 MHz
Up to 1.5 Mbps data rate with a 24 MHz crystal
frequency
16 byte Transmit FIFO to reduce the bandwidth
requirement of the external CPU
16 byte Receive FIFO with error tags to reduce
the bandwidth requirement of the external CPU
4 selectable Receive FIFO interrupt trigger
levels
Modem control signals (CTS#, RTS#, DSR#,
DTR#, RI#, CD#)
Programmable character lengths (5, 6, 7, 8)
with even, odd, or no parity
鈥?/div>
Crystal oscillator or external clock input
鈥?/div>
48-TQFP and 44-PLCC packages
A2:A0
D7:D0
IOR#
IOW#
CSA#
CSB#
INTA
INTB
TXRDYA#
TXRDYB#
RXRDYA#
RDRXYB#
Reset
8-bit Data
Bus
Interface
UART Channel A
UART
Regs
BRG
16 Byte TX FIFO
TX & RX
16 Byte RX FIFO
2.97V to 5.5V
GND
TXA, RXA, DTRA#,
DSRA#, RTSA#,
DTSA#, CDA#, RIA#,
OP2A#
UART Channel B
(same as Channel A)
TXB, RXB, DTRB#,
DSRB#, RTSB#,
CTSB#, CDB#, RIB#,
OP2B#
XTAL1
XTAL2
Crystal Osc/Buffer
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
鈥?/div>
(510) 668-7000
鈥?/div>
FAX (510) 668-7017
鈥?/div>
www.exar.com

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