鈻?/div>
STMicroelectronics' innovative ST100廬 DSP pro-
cessor core architecture has been conceived spe-
cifically for embedded applications in custom
system-on-chip products for demanding markets
like cellular phones, hard disk drives, engine man-
agement units, telecommunication systems and
advanced multimedia products. A completely new
design, the ST100廬 architecture combines in a
single core the advantages of a 16-bit instruction
word for code compactness, a 32-bit instruction
word for MCU performance and a 128-bit SLIW in-
struction word for high DSP performance. The
ST100廬 core is also scaleable, so it can be imple-
mented in many ways, ranging from low power de-
vices for portable products to very high
performance devices with a maximum of parallel-
ism. Building on ST's experience in embedded
cores, the ST100廬 architecture is based on an
analysis of the real needs of system designers and
software engineers in some of the fastest-moving
segments of the industry, where high perfor-
mance, low power consumption and fast time to
market are all essential.
Rev. 1
1/3
next
1
2
3
