512 Kbit / 1 Mbit / 2 Mbit (x8) Multi-Purpose Flash
SST39SF512A / SST39SF010A / SST39SF020A
Data Sheet
FEATURES:
鈥?Organized as 64K x8 / 128K x8 / 256K x8
鈥?Single 5.0V Read and Write Operations
鈥?Superior Reliability
鈥?Endurance: 100,000 Cycles (typical)
鈥?Greater than 100 years Data Retention
鈥?Low Power Consumption:
鈥?Active Current: 10 mA (typical)
鈥?Standby Current: 30 碌A (typical)
鈥?Sector-Erase Capability
鈥?Uniform 4 KByte sectors
鈥?Fast Read Access Time:
鈥?45 and 70 ns
鈥?Latched Address and Data
鈥?Fast Erase and Byte-Program:
鈥?Sector-Erase Time: 18 ms (typical)
鈥?Chip-Erase Time: 70 ms (typical)
鈥?Byte-Program Time: 14 碌s (typical)
鈥?Chip Rewrite Time:
1 seconds (typical) for SST39SF512A
2 seconds (typical) for SST39SF010A
4 seconds (typical) for SST39SF020A
鈥?Automatic Write Timing
- Internal V
PP
Generation
鈥?End-of-Write Detection
鈥?Toggle Bit
鈥?Data# Polling
鈥?TTL I/O Compatibility
鈥?JEDEC Standard
鈥?Flash EEPROM Pinouts and command sets
鈥?Packages Available
鈥?32-Pin PDIP
鈥?32-Pin PLCC
鈥?32-Pin TSOP (8mm x 14mm)
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PRODUCT DESCRIPTION
The SST39SF512A/010A/020A are CMOS Multi-Pur-
pose Flash (MPF) manufactured with SST鈥檚 proprietary,
high performance CMOS SuperFlash technology. The
split-gate cell design and thick oxide tunneling injector
attain better reliability and manufacturability compared
with alternate approaches. The SST39SF512A/010A/
020A devices write (Program or Erase) with a 5.0V power
supply. The SST39SF512A/010A/020A device conforms
to JEDEC standard pinouts for x8 memories.
Featuring high performance Byte-Program, the
SST39SF512A/010A/020A devices provide a maximum
Byte-Program time of 20 碌sec. These devices use Toggle
Bit or Data# Polling to indicate the completion of Program
operation. To protect against inadvertent write, they have
on-chip hardware and Software Data Protection
schemes. Designed, manufactured, and tested for a wide
spectrum of applications, these devices are offered with
a guaranteed endurance of 10,000 cycles. Data retention
is rated at greater than 100 years.
The SST39SF512A/010A/020A devices are suited for
applications that require convenient and economical updat-
ing of program, configuration, or data memory. For all
system applications, they significantly improve perfor-
mance and reliability, while lowering power consumption.
They inherently use less energy during erase and program
than alternative flash technologies. The total energy con-
sumed is a function of the applied voltage, current, and time
漏 2000 Silicon Storage Technology, Inc.
509-3 10/00
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of application. Since for any given voltage range, the
SuperFlash technology uses less current to program and
has a shorter erase time, the total energy consumed during
any Erase or Program operation is less than alternative
flash technologies. These devices also improve flexibility
while lowering the cost for program, data, and configuration
storage applications.
The SuperFlash technology provides fixed Erase and
Program times, independent of the number of Erase/
Program cycles that have occurred. Therefore the sys-
tem software or hardware does not have to be modified
or de-rated as is necessary with alternative flash tech-
nologies, whose Erase and Program times increase with
accumulated Erase/Program cycles.
To meet high density, surface mount requirements, the
SST39SF512A/010A/020A are offered in 32-pin TSOP
and 32-pin PLCC packages. A 600 mil, 32-pin PDIP is
also available. See Figures 1, 2 and 3 for pinouts.
Device Operation
Commands are used to initiate the memory operation
functions of the device. Commands are written to the device
using standard microprocessor write sequences. A com-
mand is written by asserting WE# low while keeping CE#
low. The address bus is latched on the falling edge of WE#
or CE#, whichever occurs last. The data bus is latched on
the rising edge of WE# or CE#, whichever occurs first.
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The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. MPF is a trademark of Silicon storage Technology, Inc.
These specifications are subject to change without notice.
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