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SSM6N24TU Datasheet

  • SSM6N24TU

  • High Speed Switching Applications

  • 6頁(yè)

  • TOSHIBA

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SSM6N24TU
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (U-MOSIII)
SSM6N24TU
High Speed Switching Applications
Unit: mm
鈥?/div>
鈥?/div>
Optimum for high-density mounting in small packages
Low on-resistance:
R
on
= 145m鈩?(max) (@V
GS
= 4.5 V)
R
on
= 180m鈩?(max) (@V
GS
= 2.5 V)
0.65 0.65
2.0鹵0.1
1.3鹵0.1
2.1鹵0.1
1.7鹵0.1
+0.1
0.3-0.05
Absolute Maximum Ratings
(Ta = 25擄C)
Characteristics
Drain-Source voltage
Gate-Source voltage
Drain current
Drain power dissipation
Channel temperature
Storage temperature range
DC
Pulse
Symbol
V
DS
V
GSS
I
D
I
DP
P
D
(Note 1)
1
2
3
6
5
4
Rating
30
鹵
12
0.5
1.5
500
150
鈭?5~150
Unit
V
V
A
mW
擄C
擄C
0.7鹵0.05
T
ch
T
stg
1.Source1
2.Gate1
3.Drain2
4.Source2
5.Gate2
6.Drain1
Note:
Using continuously under heavy loads (e.g. the application of
high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the
absolute maximum ratings.
Please design the appropriate reliability upon reviewing the
Toshiba Semiconductor Reliability Handbook (鈥淗andling
Precautions鈥?鈥淒erating Concept and Methods鈥? and individual
reliability data (i.e. reliability test report and estimated failure rate, etc).
UF6
JEDEC
JEITA
TOSHIBA
鈥?/div>
鈥?/div>
2-2T1B
Weight: 7.0 mg (typ.)
Note 1: Mounted on FR4 board. (total dissipation)
2
(25.4 mm
脳
25.4 mm
脳
1.6 t, Cu Pad: 645 mm )
Marking
6
5
4
Equivalent Circuit
(top view)
6
5
4
NF
1
2
3
Q1
Q2
1
2
3
Handling Precaution
When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is
protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects
that come into direct contact with devices should be made of anti-static materials.
1
2007-11-01
+0.06
0.16-0.05

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