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SSM6J50TU Datasheet

  • SSM6J50TU

  • High Current Switching Applications

  • 6頁

  • TOSHIBA

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SSM6J50TU
TOSHIBA Field Effect Transistor
Silicon P Channel MOS Type (U-MOS鈪?
SSM6J50TU
鈼?/div>
High Current Switching Applications
鈥?/div>
鈥?/div>
Compact package suitable for high-density mounting
Low on-resistance:
R
on
= 205m鈩?(max) (@V
GS
= -2.0 V)
R
on
= 100m鈩?(max) (@V
GS
= -2.5 V)
R
on
=
64m鈩?(max) (@V
GS
= -4.5 V)
Unit: mm
Absolute Maximum Ratings
(Ta
=
25擄C)
Characteristics
Drain-Source voltage
Gate-Source voltage
Drain current
Drain power dissipation
Channel temperature
Storage temperature range
DC
Pulse
Symbol
V
DS
V
GSS
I
D
I
DP
P
D
(Note 1)
T
ch
T
stg
Rating
-20
鹵10
-2.5
-5
500
150
鈭?5~150
Unit
V
V
A
mW
擄C
擄C
1,2,5,6 : Drain
3
: Gate
4
: Source
JEDEC
-
Note:
JEITA
-
Using continuously under heavy loads (e.g. the application of
TOSHIBA
2-2T1D
high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
Weight: 7 mg (typ.)
reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the absolute maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(鈥淗andling Precautions鈥?鈥淒erating Concept and Methods鈥? and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Mounted on FR4 board.
2
(25.4 mm
脳
25.4 mm
脳
1.6 t, Cu Pad: 645 mm )
Marking
6
5
4
Equivalent Circuit
6
5
4
KPB
1
2
3
1
2
3
Handling Precaution
When handling individual devices that are not yet mounted on a circuit board, be sure that the environment is
protected against electrostatic discharge. Operators should wear anti-static clothing, and containers and other objects
that come into direct contact with devices should be made of anti-static materials.
1
2007-11-01

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