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SSM6J25FE Datasheet

  • SSM6J25FE

  • High Speed Switching Applications

  • 6頁

  • TOSHIBA

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SSM6J25FE
TOSHIBA Field Effect Transistor
Silicon P Channel MOS Type (U-MOSIII)
SSM6J25FE
High Speed Switching Applications
鈥?/div>
鈥?/div>
Optimum for high-density mounting in small packages
Low on-resistance:
R
on
= 260m鈩?(max) (@V
GS
= -4 V)
R
on
= 430m鈩?(max) (@V
GS
= -2.5 V)
Unit: mm
1.6鹵0.05
1.2鹵0.05
0.2鹵0.05
0.5
1.6鹵0.05
1.0鹵0.05
1
2
3
6
5
4
0.12鹵0.05
Characteristics
Drain-Source voltage
Gate-Source voltage
Drain current
Drain power dissipation
Channel temperature
Storage temperature range
DC
Pulse
Symbol
V
DS
V
GSS
I
D
I
DP
P
D
(Note 1)
Rating
-20
12
-0.5
-1.5
500
150
鈭?5~150
Unit
V
A
mW
擄C
擄C
0.55鹵0.05
1,2,5,6 :Drain
3 :Gate
4 :Source
ES6
JEDEC
鈥?/div>
V
T
ch
T
stg
Note:
Using continuously under heavy loads (e.g. the application of
JEITA
鈥?/div>
high temperature/current/voltage and the significant change in
TOSHIBA
2-2N1A
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e.
Weight: 3.0 mg (typ.)
operating temperature/current/voltage, etc.) are within the
absolute maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(鈥淗andling Precautions鈥?鈥淒erating Concept and Methods鈥? and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Mounted on FR4 board.
2
(25.4 mm
25.4 mm
1.6 t, Cu Pad: 645 mm )
Marking
6
5
4
Equivalent Circuit
(top view)
6
5
4
PH
1
2
3
1
2
3
Handling Precaution
When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is
protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects
that come into direct contact with devices should be made of anti-static materials.
0.5
Absolute Maximum Ratings
(Ta = 25擄C)
1
2007-11-01

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