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SSM3K15FV_07 Datasheet

  • SSM3K15FV_07

  • High Speed Switching Applications

  • 126.43KB

  • 5頁(yè)

  • TOSHIBA

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SSM3K15FV
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type
SSM3K15FV
High Speed Switching Applications
Analog Switch Applications
0.22鹵0.05
Unit: mm
1.2鹵0.05
0.8鹵0.05
0.32鹵0.05
3
2
0.13鹵0.05
Optimum for high-density mounting in small packages
鈥?/div>
Low on-resistance
: R
on
= 4.0
鈩?/div>
(max) (@V
GS
= 4 V)
1.2鹵0.05
0.8鹵0.05
0.4
: R
on
= 7.0
鈩?/div>
(max) (@V
GS
= 2.5 V)
1
Absolute Maximum Ratings
(Ta
=
25擄C)
Characteristics
Drain-source voltage
Gate-source voltage
Drain current
DC
Pulse
Symbol
V
DS
V
GSS
I
D
I
DP
P
D
(Note 1)
T
ch
T
stg
Rating
30
鹵20
100
200
150
150
鈭?5~150
Unit
V
V
mA
mW
擄C
擄C
0.5鹵0.05
0.4
Drain power dissipation (Ta
=
25擄C)
Channel temperature
Storage temperature
VESM
1. Gate
2. Source
3. Drain
Using continuously under heavy loads (e.g. the application of
JEDEC
-
high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
JEITA
-
reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the
TOSHIBA
2-1L1B
absolute maximum ratings.
Weight: 0.0015 g (typ.)
Please design the appropriate reliability upon reviewing the
Toshiba Semiconductor Reliability Handbook (鈥淗andling
Precautions鈥?鈥淒erating Concept and Methods鈥? and individual reliability data (i.e. reliability test report and
estimated failure rate, etc).
Note 1: Total rating, mounted on FR4 board (25.4 mm
脳
25.4 mm
脳
1.6 t)
Note:
0.5mm
0.45mm
0.45mm
0.4mm
Marking
3
Equivalent Circuit
3
DP
1
2
1
2
Handling Precaution
When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is
protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects
that come into direct contact with devices should be made of anti-static materials.
1
2007-11-01

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