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=
Power-Transistor
P-Channel
Enhancement mode
Logic Level
175擄C operating temperature
Avalanche rated
dv/dt rated
-60
0.25
-9.7
P-TO252
V
Drain
pin 2
Type
SPD09P06PL
SPU09P06PL
Package
P-TO252
P-TO251-3-1
Ordering Code
Q67042-S4007
Q67042-S4020
Gate
pin1
Source
pin 3
Maximum Ratings,at
T
j
= 25 擄C, unless otherwise specified
Parameter
Continuous drain current
T
C
=25擄C
T
C
=100擄C
Symbol
I
D
Value
-9.7
-6.8
Unit
A
Pulsed drain current
T
C
=25擄C
I
D puls
E
AS
E
AR
dv/dt
V
GS
P
tot
T
j ,
T
stg
-38.8
70
4.2
6
鹵20
42
-55... +175
55/175/56
kV/碌s
V
W
擄C
mJ
Avalanche energy, single pulse
Avalanche energy, periodic limited by
T
jmax
Reverse diode dv/dt
I
S
=-9.7A,
V
DS
=-48,
di/dt=200A/碌s,
T
jmax
=175擄C
Gate source voltage
Power dissipation
T
C
=25擄C
Operating and storage temperature
IEC climatic category; DIN IEC 68-1
I
D
=-9.7 A ,
V
DD
=-25V,
R
GS
=25
Page 1
2001-07-02
A