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SP8782B Datasheet

  • SP8782B

  • 1GHz 16/17, 32/33 Multi-Modulus Divider

  • 267.81KB

  • Zarlink   Zarlink

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SP8782A & B
1GHz 16/17, 32/33 Multi-Modulus Divider
March 2006
Features
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鈥?/div>
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Advanced Resynchronisation techniques to negate
loop delay effects
CMOS compatible output capability
Multi-Modulus division
Available as DESC SMD 5962-9208901MPA
Ordering Information
SP8782/B/MP
SP8782/A/DG
SP8782/B/MPTC
SP8782/B/MP2Q
8 Pin SOP/SOIC
8 Pin CERDIP
8 Pin SOP/SOIC
8 Pin SOP/SOIC**
Tubes
Tubes
Tape & Reel
Tape & Reel
**Pb Free Tin/Silver/Copper
Description
The SP8782 is a multi-modulus divider which divides by 16/
17 when the Ratio Select input is low and by 32/33 when
theRatio Select input is high. When high, the modulus Control
input selects the lower division ratio (16 or 32) and the higher
ratio (17 or 33) when it is low.
The device uses resynchronisation techniques to reduce the
effects of propagation delays in frequency synthesis.
The SP8782A (ceramic DIL package) is characterised over
the full military temperature range of -55 C to +125 C, the
SP8782B (miniature plastic DIL package) over the industrial
range of -40 C to+85 C.
Absolute Maximum Ratings
Supply Voltage
Clock input level
Junction temperature
Storage temperature range:
SP8782A
SP8782B
6V
2.5V p-p
+175 C
-55 C to +150 C
-55 C to +125 C
RATIO
SELECT
1
V
CC
2
CLOCK INPUT
CLOCK INPUT
2
3
16/17
32/33
7
OUTPUT
4
V
EE
5
MODULUS
CONTROL
INPUT
Figure 1 Functional Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright
1999-2006,
Zarlink Semiconductor Inc. All Rights Reserved.

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