Picture Processor
SDA 9290-5
Preliminary Data
Features
q
Noise and cross color reduction by field - or frame
q
q
q
q
q
q
q
q
q
NMOS IC
recursive filtering
3 adjustments: 4-dB-, 7-dB- or 12-dB reduction
Automatic adaption to signal quality during vertical
blanking
Pixel adaptive movement detection
Split screen modes for demonstration purposes
Multi-picture facilities
Picture decimation using vertical filtering
8 programmable grey levels for framing
4:1:1 and 4:2:2 (Y:U:V) compatibility
8-bit word size for all components
P-LCC-68-1
Type
SDA 9290-5
Ordering Code
Q67100-H5088
Package
P-LCC-68-1 (SMD)
Functional Description
The NMOS device SDA 9290-5 is a picture processor and belongs to a family of devices forming
an extended third-generation digital TV signal-processing system for enhanced picture quality with
special functions (Featurebox). Besides the Picture Processor (PP) that is described here, the
system consists of a field memory (at least three triple-port, 1-Mbit generation
TV Sequential-
Access Memory
devices (SDA 9251 X), a
Memory Sync Controller
(MSC SDA 9220-5) and a
Video
D/A
converter (SDA 9094-5). A block diagram of the Featurebox is shown in
figure 1.
The Picture Processor SDA 9290-5 is a follow-on development of the Picture Processor SDA 9090
from the second-generation Featurebox and permits further picture improvement by reducing the
video noise and cross-color interference. The SDA 9290-5 can be set independently at the picture-
signal input and output via the two pins FSBQ/FSI to the 4:1:1 and 4:2:2 formats. A 4:1:1
Featurebox (3 TV-SAMs) can therefore be operated with 4:2:2 input signals as well.
Semiconductor Group
259
01.94