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SDA9257 Datasheet

  • SDA9257

  • Clock Sync Generator

  • 36頁(yè)

  • INFINEON   INFINEON

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Clock Sync Generator
SDA 9257
Preliminary Data
Features
q
q
q
q
MOS IC
q
q
q
q
q
q
All settings made by
I
2
C Bus
PLL lock-in behavior can be set to TV- or VCR mode
Automatic clamping of CVBS input
Provides all horizontal and vertical sync signals and
clocks for operating PAMUX, analog color decoders,
the A/D converters, PSND and Featurebox
Free-running capability
Frequency generator function possible with digitally
P-DIP-28-1
adjustable frequency
Lock-in function of the PLL on CVBS also possible
with externally supplied 24-MHz or 27-MHz clock
Multi-standard operation (50 Hz, 60 Hz; PAL, NTSC, SECAM)
Vertical noise suppression and 50/60-Hz detection
Serial digital output for actual frequency value and CVBS-black level
Applications
q
q
q
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Memory based image improvement with analog color decoder
Memory based image improvement with digital multi-standard decoder
Free-running sync generator
Digital frequency synthesizer
Type
SDA 9257
Functional Description
Ordering Code
Q67100-H5038
Package
P-DIP-28-1
The clock sync generator consists essentially of the following function blocks (refer
to block
diagram):
Analog clamping
7-bit, 27-MHz A/D converter
Sync processor with digital horizontal PLL, vertical sync processor and pulse generator
Clock generator with discrete timing oscillator, D/A converter, analog PLL and divider, as well as
a crystal oscillator
q
I
2
C Bus interface
q
Button flutter elimination
q
q
q
q
Semiconductor Group
182
01.94

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