2.6 MBit Dynamic Sequential Access Memory
for Television Applications (TV-SAM)
SDA 9253
Preliminary Data
Features
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CMOS IC
212
脳
64
脳
16
脳
12-bit organization
Triple port architecture
One 16
脳
12-bit input shift register
Two 16
脳
12-bit output shift registers
Shift registers independently and simultaneously
accessible
Continuous data flow even at maximum speed
40-MHz shift rate 鈥?0.96-Gbit/s total data rate
All inputs and outputs TTL-compatible
Tristate outputs
Random access of groups of 16
脳
12 bits for a wide range
of applications
Refresh-free operation possible
5 V
鹵
10 % power supply
0 鈥?70
擄C
operating temperature range
Low power dissipation: 700 mW active, 28 mW standby
Suitable for all common TV standards
Allows flicker and noise reduction simultaneously
with only one field memory
Applications: TV, VCR, image processing,
video printers, data compressors, delay lines,
time base correctors, HDTV
P-MQFP-64-1
Type
SDA 9253
Ordering Code
Q67101-H5171
Package
P-MQFP-64-1
Semiconductor Group
1
1998-01-30