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SDA9220-5 Datasheet

  • SDA9220-5

  • Memory Sync Controller III

  • 1475.80KB

  • 42頁

  • INFINEON   INFINEON

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Memory Sync Controller III
SDA 9220-5
Preliminary Data
Features
Large area flicker elimination through field doubling
Additional elimination of interline flicker in field mode
Field switching and selection in field mode
Noise and cross-color reduction
Stills
9-image display, still-in-picture, picture-in-still
with different frame versions
q
Zoom with selection of enlarged picture segment
(8 x 12 positions)
q
Pin-programmable operation without standard
conversion
q
q
q
q
q
q
MOS IC
P-LCC-44-1
Type
SDA 9220-5
Functional Description
Ordering Code
Q67100-H5087
Package
P-LCC-44-1 (SMD)
The MSC III is a component of the TV-SAM Featurebox and is responsible for driving the picture
memory devices (TV-SAMs) and generating sync signals (figure
6).
Together with the other
devices of the Featurebox it enhances picture quality and offers a number of special operating
modes.
The MSC III is set via the
I
2
C Bus, it being possible to switch the
I
2
C Bus address by hardware so
that implementation of a simple frame Featurebox is possible in conjunction with the signal MUX
supplied by the MSC III.
Other major output signals of the SDA 9220-5, in addition to the clocks LL3X (13.5 MHz) and LL1.5X
(27 MHz), are the memory-driving signals (RA, RB, WT, RE, SCAD, SCA) and the sync signal CSY
for the teletext device. The horizontal sync signals (HS2, BLN2) and the vertical sync signals (VS1,
VS2) are also generated.
Semiconductor Group
117
01.94

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