SCAN18540T Inverting Line Driver with TRI-STATE Outputs
September 1998
SCAN18540T
Inverting Line Driver with TRI-STATE
廬
Outputs
General Description
The SCAN18540T is a high speed, low-power line driver fea-
turing separate data inputs organized into dual 9-bit bytes
with byte-oriented paired output enable control signals. This
device is compliant with IEEE 1149.1 Standard Test Access
Port and Boundary Scan Architecture with the incorporation
of the defined boundary-scan test logic and test access port
consisting of Test Data Input (TDI), Test Data Out (TDO),
Test Mode Select (TMS), and Test Clock (TCK).
Features
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IEEE 1149.1 (JTAG) compliant
Dual output enable signals per byte
TRI-STATE outputs for bus-oriented applications
9-bit data busses for parity applications
Reduced-swing outputs source 24 mA/sink 48 mA (Mil)
Guaranteed to drive 50鈩?transmission line to TTL input
levels of 0.8V and 2.0V
TTL compatible inputs
25 mil pitch Cerpack packaging
Includes CLAMP and HIGHZ instructions
Standard Microcircuit Drawing (SMD) 5962-9312701
Connection Diagram
Pin Names
AOE
1
, AOE
2
BOE
1
, BOE
2
AO
(0鈥?)
BO
(0鈥?)
Description
TRI-STATE Output Enable Input pins,
A side
TRI-STATE Output Enable Input pins,
B side
Output pins, A side
Output pins, B side
DS100323-1
Pin Names
AI
(0鈥?)
BI
(0鈥?)
Description
Input pins, A side
Input pins, B side
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
漏 1998 National Semiconductor Corporation
DS100323
www.national.com