鈥?/div>
S29C51001B
(Bottom Boot Block)
Packages:
鈥?32-pin Plastic DIP
鈥?32-pin TSOP-I
鈥?32-pin PLCC
Description
The
S29C51001T/S29C51001B
is a high speed
131,072 x 8 bit CMOS flash memory. Programming
or erasing the device is done with a single 5 Volt
power supply. The device has separate chip enable
CE, program enable WE, and output enable OE
controls to eliminate bus contention.
The
S29C51001T/S29C51001B
offers a combi-
nation of features: Boot Block with Sector Erase
Mode. The end of program/erase cycle is detected
by DATA Polling of I/O
7
or by the Toggle Bit I/O
6
.
The
S29C51001T/S29C51001B
features a
sector erase operation which allows each sector to
be erased and reprogrammed without affecting
data stored in other sectors. The device also
supports full chip erase.
Boot block architecture enables the device to
boot from a protected sector loaded either at the
top (S29C51001T) or the bottom (S29C51001B)
sector. All inputs and outputs are CMOS and TTL
compatible.
The
S29C51001T/S29C51001B
is ideal for
applications that require updatable code and data
storage.
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S29C51001T/S29C51001B V1.0 February 2003
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