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RTL8201L Datasheet

  • RTL8201L

  • Layout guide

  • 7頁

  • ETC

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RTL8201 PCB Layout Guide
1. Introduction
Goal : (1) Make a Noise-free, power-stable, environment that suitable for RTL8201.
(2) Reduce the possibility of EMI, EMC and their influence to the chip.
(3) Simplify the task of routing signal trace, so as to make a better circuit for
RTL8201.
2. Placement
Ideally placement: as fellow
L2
A
Tx鹵
Rx鹵
Mag
RJ-45
L1
MAC
MII
Interface
RTL
8201
B
OSC
!
!
!
!
Block A should place as close to RTL8201 as possible. Block B may be placed
close to Mag. (Since when Tx, RTL8201 will sink current from Block A. When Rx,
RTL8201 will take differential volt signal from Block B.
The distance between RJ-45 to Mag. (L1) should be as short as possible.
RTset of RTL8201 pin 28 should placed as close to RTL8201 as possible and if
possible, it should be placed away from TX+/-,RX+/-, and clock signals.
Crystal should not be placed near I/O ports and board edges and other high-freq.
devices or traces (such as Tx , Rx and Power signals) or magnetic field device (such
as magnetic).
The outer shield of Crystal need well grounding to avoid EMC/EMI to induce extra
noise, the retaining straps of the Crystal need well grounding, so as the case of
Crystal.
The magnetic device or devices with magnetic fields should be separated and
!
!
8201layoutguide(V1.00)
2000-11-08
1
REALTEK
Chip design & System design

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