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ROMCS0 Datasheet

  • ROMCS0

  • ROMCS0 Redirection to PC Card Socket A on the ?lanSC400 Micr...

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ROMCS0 Redirection to PC Card Socket A
on the 脡lan
TM
SC400 Microcontroller
Application Note
by Dave Tobias
The 脡lan鈩C400 microcontroller supports a unique feature benefiting those involved with manu-
facturing, testing, and field upgrade of firmware on 脡lanSC400 microcontroller-based products.
This feature is a pin-strap option that allows memory cycles that hit the region decoded by the boot
ROM chip select (ROMCS0) logic to be redirected to PC Card Socket A.
Using the ROMCS0 redirection feature, products can
be manufactured using Flash memory devices on
which the system firmware has not yet been loaded.
Using this technique allows the OEM to delay loading
the firmware until after the product is built, thus allow-
ing the very latest level of firmware to ship with the
product.
The ROMCS0 redirection feature also allows a field
service facility to test the end product simply by placing
a linear memory (not AT Attach (ATA)) PC Card into
Socket A (which contains product-specific diagnos-
tics), setting a jumper, and pressing reset.
Perhaps one of the most compelling uses for the
ROMCS0 redirection feature is to perform safe field
upgrades of system firmware. On many systems,
including user-friendly desktop systems, the boot ROM
is soldered down. The system vendors often allow the
end user to download BIOS updates over the internet,
and then program the updates into the system Flash
memory using a custom programming utility.
In most cases, the user is warned not to turn off the
system power during the Flash memory programming
process. Losing system power during this operation
may result in having to remove the soldered Flash
memory device, and reprogram it using an EPROM
burner.
This is never a problem when using the 脡lanSC400
microcontroller鈥檚 ROMCS0 redirection feature because
the linear memory in the PC Card socket functions as
the boot ROM when ROMCS0 is redirected there.
To use the ROMCS0 redirection feature, PC Card
socket power must be maintained at all times while
code or data fetches are being performed from it. On
the 脡lanSC400 microcontroller, general purpose I/Os
GPIO15鈥揋PIO13 have a secondary, programmable
function as PC Card socket power controls.
By default, GPIO15鈥揋PIO13 are general purpose I/Os
with their default termination set up so that the socket
power for PC Card Socket A is turned on. This is done
specifically to support the ROMCS0 redirection feature
and is required because the PC Card socket power
must be enabled at system reset for the initial opcode
fetches from the linear memory PC Card to be per-
formed.
During initialization, firmware typically programs the
脡lanSC400 microcontroller configuration, status, and
control (CSC) registers very early in the process. If the
PC Card controller is used, one of these initializations
eventually sets CSC index 39h[5]. This bit controls the
function muxing on three of the 脡lanSC400
microcontroller pins.
At reset, these pins default to GPIO15鈥揋PIO13.
Setting CSC index 39h[5] turns these pins into PC Card
Socket A power controls. However, as soon as
GPIO15鈥揋PIO13 are transformed into PC Card socket
power controls, the default GPIO termination is
disabled, and the control of these pins comes from
PCMCIA register (i.e., 3E0/3E1 space) index 02h[4].
Firmware that enables the PC Card socket power
control function on these pins may thus inadvertently
shut off the power to the PC Card socket from which it鈥檚
running, which will result in a system malfunction.
To work around this situation, BIOS or other firmware
initialization code that configures GPIO15鈥揋PIO13 as
PC Card socket power controls should first enable the
PC Card controller via CSC index D0h[1], and then set
02h[4] in PC Card register space to enable the PC Card
socket power via the PC Card controller registers. After
this is done, CSC index 39h[5] may be set, thus en-
abling GPIO15鈥揋PIO13 as PC Card socket power
controls, without losing power to the PC Card socket.
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this product
without notice.
Publication#
21643
Rev:
A
Amendment/0
Issue Date:
November 1997

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