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RNA52A10MM Datasheet

  • RNA52A10MM

  • Dual CMOS system-RESET IC

  • 11頁

  • RENESAS

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RNA52A10MM
Dual CMOS system鈥揜ESET IC
REJ03D0858-0400
Rev.4.00
Feb 23, 2007
Description
The RNA52A10MM incorporates two reset circuits, one with and one without a delay function, allowing the generation
of separate reset signals for a microprocessor and associated system circuits. The detection voltage of each reset
circuit is determined by the value of an external resistor, and the internal reference voltage is 1.0 V. The CMOS
process for the RNA52A10MM means that the device draws only 1.1
碌A(chǔ)
(typ.). The reset cancellation delay time is
set with a high degree of accuracy by the values of a capacitor and resistor connected with the CD pin. The MR
(manual reset) input pin is provided for the reset circuit with the delay function, and the reset signal is output in
response to a high level on the MR input pin. The MR pin is pulled down by a 2-M鈩?internal resistor. Output pins
Vo1 and Vo2 are open drain.
Features
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Two CMOS reset circuits, one with and one without the delay function
Reference voltage: 1.0 V
Reference voltage accuracy: 鹵 50 mV
Reference voltage hysteresis: 6% (typ.)
Low current consumption: 1.1
碌A(chǔ)
(typ.)
Delay time set by an external CR circuit
Manual reset input
Open-drain output
MMPAK-8 (8-pin) package
Operating temperature range: 鈥?40 to 85擄C
Pin Arrangement
MR
Vo1
Vo2
GND
1
2
3
4
8
7
6
5
VDD
Vi1
Vi2
CD
Application
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Power-supply monitoring and resetting for microprocessors
Power supply sequence control for microprocessors
Desktop and laptop PCs
PC peripheral devices such as printers
Digital still cameras, digital video cameras, and PDAs
Battery-driven products
Wireless communications systems
Rev.4.00
Feb 23, 2007
page 1 of 10

RNA52A10MM 產(chǎn)品屬性

  • 表面貼裝

  • 2.8mm

  • MMPAK

  • 2.95 x 2.8 x 1.1mm

  • 8

  • 有

  • -40 °C

  • 5.5 V

  • 5.8V

  • 1.4 V

  • 0V

  • +85 °C

  • 2

  • CMOS

  • 2.95mm

  • 1.1mm

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