applications. The 2 stage PAM is internally matched to 50
鈩?/div>
to minimize the use of external components and features a
low-power mode to reduce standby current and DC power
consumption during peak phone usage. High power-added
efficiency and excellent linearity are achieved using our
InGaP Heterojunction Bipolar Transistor (HBT) process.
Features
鈥?Single positive-supply operation with low power and
shutdown modes
鈥?40% CDMA efficiency at +28 dBm average output power
鈥?52% AMPS mode efficiency at +31 dBm output power
鈥?Compact LCC package ( 3.0 x 3.0 x 1.0 mm)
鈥?Internally matched to 50
鈩?/div>
and DC blocked RF input/
output
鈥?Meets CDMA2000-1XRTT performance requirements
Device
Absolute Ratings
1
Symbol
Vcc1, Vcc2
Vref
Vmode
Pin
T
STG
Parameter
Supply Voltages
Reference Voltage
Power Control Voltage
RF Input Power
Storage Temperature
Value
5.0
2.6 to 3.5
3.5
+10
-55 to +150
Units
V
V
V
dBm
擄C
Note:
1:
No permanent damage with only one parameter set at extreme limit. Other parameters set to typical values.
Functional Block Diagram
(Top View)
MMIC
Vcc1 1
RF IN 2
Vmode 3
DC BIAS CONTROL
Vref 4
INPUT
MATCH
OUTPUT
MATCH
8 Vcc2
7 RF OUT
6 GND
5 GND
(paddle ground on package bottom)
漏2004 Fairchild Semiconductor Corporation
RMPA0965 Rev. C
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