鈩?/div>
Digitally selectable 12.5 or 100 kbit/sec data rate
Adjustable output voltages swing
Output overvoltage protected
Short circuit protected
TTL and CMOS compatible inputs
Available in 16-lead ceramic sidebrazed DIP
Description
The RM3182A is a complete differential line driver IC.
When Data A = Data B or Sync or Clock Signal is low, the
driver forces the output to a Voltage Null level
(0V 鹵 250 mV). Designed to address the ARINC 429 stan-
dard, the RM3182A has output rise and fall times that can be
adjusted by the selection of an external capacitor (C
A
or C
B
)
and an output voltage range adjustable through an externally
applied V
REF
signal. All logic inputs and sync control inputs
are TTL/CMOS compatible. The device is constructed on a
monolithic IC using a junction-isolated bipolar process.
Sputtered SiCr resistors in the internal bias circuitry provide
for stable bias currents and a tighter tolerance of output
impedance. The RM3182A is available in 16-lead ceramic
sidebrazed DIP.
Block Diagram
Cap (A)
5
V
CC
9
V
CC
3 pF
10
Amp A
Charge Pumps
Data (A)
Clock
Sync
V
REF
Data (B)
4
14
3
1
13
Data (A)
Clock
Sync
V
REF
Data B
V
LOGIC
V
LOGIC
16
V
LOGIC
Rate
Select
2
Rate
Select
Cap (B)
I
SET
(B)
10K
11
37.5鈩?/div>
I
SET
(A)
I
SET
(B)
3 pF
12
Cap B
8
GND
7
V
EE
V
EE
65-5890A
10K
10K
37.5鈩?/div>
Out A
6
Cap (A)
I
SET
(A)
10K
10K
V
EE
10K
V
CC
R
L
C
L
Out B
Amp B
15
10K
10K
Note: Pin numbers are for the DIP package.
REV. 1.0.1 12/7/00
next