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RIC7113E4 Datasheet

  • RIC7113E4

  • RADIATION HARDENED HIGH AND LOW SIDE GATE DRIVER

  • 171.73KB

  • 9頁

  • IRF

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PD-93920A
RIC7113E4
RADIATION HARDENED HIGH AND LOW SIDE GATE DRIVER
Features
n
Total dose capability to 100K Rad (Si)
n
Floating channel designed for bootstrap operation
n
Fully operational to +400V
n
Tolerant to negative transient voltage
n
dV/dt immune
n
Gate drive supply range from 10 to 20V
n
Undervoltage lockout for both channels
n
Separate logic supply range from 5 to 20V
Logic and power ground 鹵5V offset
n
CMOS Schmitt-triggered inputs with pull-down
n
Cycle by cycle edge-triggered shutdown logic
n
Matched propagation delay for both channels
n
Outputs in phase with inputs
Product Summary
VOFFSET
IO+/-
VOUT
ton/off (typ.)
Delay Matching(typ.)
400V max.
2A / 2A
10 - 20V
120 & 100 ns
5 ns
Description
The RIC7113E4 is a high voltage, high speed power
MOSFET and IGBT driver with independent high and low
side referenced output channels. Proprietary HVIC and
latch immune CMOS technologies enable ruggedized
monolithic construction. Logic inputs are compatible with
standard CMOS or LSTTL outputs. The output drivers
n
Hermetically Sealed
feature a high pulse current buffer stage designed for
minimum driver cross-conduction. Propagation delays are
n
Lightweight
matched to simplify use in high frequency applications.
The floating channel can be used to drive an N-channel
power MOSFET or IGBT in the high side configuration
which operates up to 400 volts.
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are
absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board
mounted and still air conditions.
Absolute Maximum Ratings
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
DD
V
SS
V
IN
dV
s
/dt
P
D
R
thJA
T
J
T
S
T
L
Parameter
High Side Floating Supply Voltage
High Side Floating Supply Offset Voltage
High Side Floating Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Logic Supply Voltage
Logic Supply Offset Voltage
Logic Input Voltage (HIN, LIN & SD)
Allowable Offset Supply Voltage Transient (Figure 2)
Package Power Dissipation @ T
A
+25擄C
Thermal Resistance, Junction to Ambient
Junction Temperature
Storage Temperature
Lead Temperature (Soldering, 10 seconds)
Weight
Min.
-0.5
鈥?/div>
V
S
- 0.5
-0.5
-0.5
-0.5
V
CC
- 20
V
SS
- 0.5
鈥?/div>
鈥?/div>
鈥?/div>
-55
-55
鈥?/div>
Max.
V
S
+ 20
400
V
B
+ 0.5
20
V
CC
+ 0.5
V
SS
+ 20
V
CC
+ 0.5
V
DD
+ 0.5
50
1.6
125
125
150
300
Units
V
V/ns
W
擄C/W
擄C
g
0.42 (typical)
www.irf.com
1
5/3/2001

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