鈻?/div>
Advanced+ Boot Block Flash Memory
鈥?70 ns Access Time at 2.7 V
鈥?Instant, Individual Block Locking
鈥?128 bit Protection Register
鈥?12 V Production Programming
鈥?Ultra Fast Program and Erase Suspend
鈥?Extended Temperature 鈥?5 擄C to +85 擄C
Blocking Architecture
鈥?Block Sizes for Code + Data Storage
鈥?4-Kword Parameter Blocks (for data)
鈥?64-Kbyte Main Blocks (for code)
鈥?100,000 Erase Cycles per Block
Low Power Operation
鈥?Async Read Current: 9 mA (Flash)
鈥?Standby Current: 7 碌A(chǔ) (Flash)
鈥?Automatic Power Saving Mode
Flash Technologies
鈥?0.25 碌m ETOX鈩?VI, 0.18 碌m ETOX鈩?/div>
VII and 0.13 碌m ETOX鈩?VIII Flash
Technologies
鈥?28F160xC3, 28F320xC3
The 3 Volt Intel
廬
Advanced+ Boot Block Flash Memory (C3) Stacked-Chip Scale Package
(Stacked-CSP) device delivers a feature-rich solution for low-power applications. The C3
Stacked-CSP memory device incorporates flash memory and static RAM in one package with
low voltage capability to achieve the smallest system memory solution form-factor together with
high-speed, low-power operations. The C3 Stacked-CSP memory device offers a protection
register and flexible block locking to enable next generation security capability. Combined with
the Intel
廬
Flash Data Integrator (Intel
廬
FDI) software, the C3 Stacked-CSP memory device
provides a cost-effective, flexible, code plus data storage solution.
Notice:
This document contains information on new products in production. The specifications
are subject to change without notice. Verify with your local Intel sales office that you have the lat-
est datasheet before finalizing a design.
252636-001
February, 2003
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