音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

RC32365 Datasheet

  • RC32365

  • Integrated Communications Processor

  • 807.27KB

  • IDT

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書(shū)

PDF預(yù)覽

IDT
TM
Interprise
TM
Integrated
Communications Processor
RC32365
Device Overview
The RC32365 device is a member of the IDT鈩?Interprise鈩?family of
integrated communications processors. This device is designed to
address a range of communications applications that require the effi-
cient processing of IPSec algorithms. These applications include gate-
ways, wireless access points, and virtual private network (VPN)
equipment. The key to the RC32365鈥檚 efficient processing of IPSec
algorithms is a highly progammable security engine which off-loads the
CPU core of encryption/decryption, hashing, and padding tasks.
Features List
鈼?/div>
RC32300 32-bit CPU core
鈥?32-bit MIPS instruction set
鈥?Supports big or little endian operation
鈥?MMU
鈥?16-entry TLB
鈥?Supports variable page sizes and enhanced write algo-
rithm
鈥?Supports variable number of locked entries
鈥?8KB Instruction Cache
鈥?2-way set associative
鈥?LRU replacement algorithm
鈥?4 word line size
鈥?Sub-block ordering
鈥?Word parity
鈥?Per line cache locking
鈥?2KB Data Cache
2-way set associative
LRU replacement algorithm
4 word line size
Sub-block ordering
Byte parity
Per line cache locking
Can be programmed on a page basis to implement write-
through no write allocate, write-through write allocate, or
write-back algorithms
鈥?Enhanced EJTAG and JTAG Interfaces
鈥?Compatible with IEEE Std. 1149.1-1990
鈼?/div>
Security Engine
鈥?Dedicated DMA channels for high speed data transfers to and
from the security engine
鈥?On-chip memory for storage of two security contexts
鈥?Supports ECB and CBC modes for the following symmetric
encryption algorithms: DES, triple DES (both two key (k1=k3)
and three key (k1!=k3) modes), AES-128 with 128-bit blocks,
AES-192 with 128-bit blocks
鈥?Hardware support for encryption pad generation and checking
using one of seven popular padding algorithms: supports pad
algorithm required by IPSec ESP
鈥?Supports MD5 and SHA-1 one-way hash functions
鈥?Programmable truncation length of computed hash and HMAC
on a security context basis
鈥?Supports concurrent hash and encryption operations
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Block Diagram
MII
MII
32-bit MIPS
CPU Core
JTAG
EJTAG
D. Cache
MMU
I. Cache
Security Functions
Interrupt
Controller
.
.
Bus/System
Integrity
Monitor
2 Ethernet
10/100
Interfaces
Security
Context Storage
Hash
Unit
RNG
Encryption
Unit
DMA
Controller
Arbiter
IPBus
TM
Controllers
including PCMCIA
Support
SDRAM & Device
3 Counter
Timers
UART
(16550)
GPIO
Interface
SPI
Controller
PCI
Master/Target
Interface
PCI Arbiter
(Host Mode)
Memory &
Peripheral Bus
(including PCMCIA)
Serial Channel
GPIO Pins
SPI Bus
PCI Bus
Figure 1 RC32365 Internal Block Diagram
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
1 of 44
漏
2005 Integrated Device Technology, Inc.
October 5, 2005
DSC 6210

RC32365相關(guān)型號(hào)PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫(kù)提出的寶貴意見(jiàn)，您的參與是維庫(kù)提升服務(wù)的動(dòng)力！意見(jiàn)一經(jīng)采納，將有感恩紅包奉上哦！