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R2061S02-E2 Datasheet

  • R2061S02-E2

  • wire interface Real-Time Clock ICs with Battery Backup switc...

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R2061 SERIES
3 wire interface Real-Time Clock ICs with Battery Backup switch-over Function
NO.EA-112-070427
OUTLINE
The R2061 is a CMOS real-time clock IC connected to the CPU by three signal lines, CE, SCLK, and SIO, and
configured to perform serial transmission of time and calendar data to the CPU. Further, battery backup
switchover circuit and a voltage detector. The periodic interrupt circuit is configured to generate interrupt signals
with six selectable interrupts ranging from 0.5 seconds to 1 month. The 2 alarm interrupt circuits generate
interrupt signals at preset times. As the oscillation circuit is driven under constant voltage, fluctuation of the
oscillator frequency due to supply voltage is small, and the time keeping current is small (TYP. 0.4碌A(chǔ) at 3V). The
oscillation halt sensing circuit can be used to judge the validity of internal data in such events as power-on; The
supply voltage monitoring circuit is configured to record a drop in supply voltage below two selectable supply
voltage monitoring threshold settings. The oscillation adjustment circuit is intended to adjust time counts with
high precision by correcting deviations in the oscillation frequency of the quartz crystal unit. Battery backup
switchover function is the automatic switchover circuit between a main power supply and a backup battery of
primary or secondary battery. Switchover is executed by monitoring the voltage of a main power supply,
therefore the voltage of a backup battery voltage is not relevant. Since the package for these ICs is SSOP16
(5.0x6.4x1.25: R2061Sxx) and FFP12 (2.0x2.0x1.0: R2061Kxx), high density mounting of ICs on boards is
possible.
FEATURES
鈥?/div>
Minimum Timekeeping supply voltage Typ. 0.75V (Max. 1.00V); VDD pin
鈥?/div>
Low power consumption
Typ. 0.4碌A(chǔ) (Max. 1.0碌A(chǔ)) at V
DD
=3V
鈥?/div>
Built-in Backup switchover circuit (can be used for a primary battery, a secondary battery, or an electric
double layer capacitor)
鈥?/div>
Three signal lines (CE, SCLK, and SIO) required for connection to the CPU. 路路路路路
鈥?/div>
(Maximum clock frequency of 1MHz (with V
CC
= 3V) )
鈥?/div>
Time counters (counting hours, minutes, and seconds) and calendar counters (counting years, months,
days, and weeks) (in BCD format)
鈥?/div>
Interrupt circuit configured to generate interrupt signals (with interrupts ranging from 0.5 seconds to 1
month) to the CPU and provided with an interrupt flag and an interrupt halt
鈥?/div>
2 alarm interrupt circuits (Alarm_W for week, hour, and minute alarm settings and Alarm_D for hour and
minute alarm settings)
鈥?/div>
Built-in voltage detector with delay
鈥?/div>
With Power-on flag to prove that the power supply starts from 0V
鈥?/div>
Supply voltage monitoring circuit with two supply voltage monitoring threshold settings
鈥?/div>
Automatic identification of leap years up to the year 2099
鈥?/div>
Selectable 12-hour and 24-hour mode settings
鈥?/div>
Built-in oscillation stabilization capacitors (CG and CD)
鈥?/div>
High precision oscillation adjustment circuit
鈥?/div>
CMOS process
鈥?/div>
Package SSOP16 (5.0mm x 6.4mm x 1.25mm : R2061Sxx), FFP12 (2.0mm x 2.0mm x 1.0mm : R2061Kxx
1

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