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QS532806ASO Datasheet

  • QS532806ASO

  • Five Distributed-Output Clock Driver

  • 6頁(yè)

  • ETC

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QS532806/A
GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
GUARANTEED LOW SKEW
3.3V CMOS CLOCK
DRIVER/BUFFER
FEATURES:
鈭?/div>
鈭?/div>
鈭?/div>
鈭?/div>
鈭?/div>
鈭?/div>
鈭?/div>
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JEDEC compatible LVTTL level
10 low skew clock outputs
Monitor output
Clock inputs are 5V tolerant
Pinout and function compatible with QS5806
25鈩?on-chip resistors for low noise
Input hysteresis for better noise margin
Guaranteed low skew:
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0.7ns output skew (same bank)
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0.9ns output skew (different bank)
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1ns part-to-part skew
Std. and A speed grades
Available in QSOP and SOIC packages
QS532806/A
DESCRIPTION
The QS532806 clock driver/buffer circuit can be used for clock buffering
schemes where low skew is a key parameter. The QS532806 offers two
banks of five inverting outputs. Designed in IDT's proprietary CMOS
process, these devices provide low propagation delay buffering with on-
chip skew of 0.7ns for same-transition, same-bank signals.
The QS532806 has on-chip series termination resistors for lower noise
clock signals. The series resistor versions are recommended for driving
unterminated lines with capacitive loading and other noise sensitive clock
distribution circuits. These clock buffer products are designed for use in
high-performance workstations, embedded and personal computing sys-
tems. Several devices can be used in parallel or scattered throughout a
system for guaranteed low skew, system-wide clock distribution networks.
鈭?/div>
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FUNCTIONAL BLOCK DIAGRAM
OE
A
5
IN
A
O A
5 -
O A
1
MO N
5
O B
5 -
O B
1
IN
B
OE
B
INDUSTRIAL TEMPERATURE RANGE
1
c
1999
Integrated Device Technology, Inc.
SEPTEMBER 2000
DSC-5783/-

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