鈥?/div>
1 AMP ADJUSTABLE LOW VOLTAGE INPUT
INTEGRATED SWITCHING REGULATOR
SLTS081
(Revised 6/4/98)
Low Voltage Input (7V)
89% Efficiency
Adjustable Output Voltage
Internal Short Circuit Protection
Over-T
emperature Protection
On/Off Control (Ground Off)
The PT6120 series is a low volt-
age input (typically 7V) version of
Power Trends鈥?high-performance
1A, 12 pin SIP Integrated Switching
Regulators (ISRs). These ISRs are de-
signed with premium low threshold FETs
for those applications requiring very low
input/output voltage differentials such as
battery powered equipment. This high-
performance ISR family offers a unique
combination of features combining 89%
typical efficiency with open-collector on/
off control and adjustable output voltage.
Quiescent current in the shutdown mode
is less than 100碌A(chǔ).
Pin-Out Information
Pin
Function
Inhibit
(30V max)
Ordering Information
PT6121!
= +5 Volts
PT6122!
= +3.3 Volts
PT Series Suffix
(PT1234X)
Case/Pin
Configuration
Vertical Through-Hole
Horizontal Through-Hole
Horizontal Surface Mount
Standard Application
V
O
ADJ
12
V
IN
2,3,4
1
PT6120
5,6,7,8
9,10,11
V
OUT
C1
INH
GND
Q1
C2
+
GND
C
1
= Optional 1碌F ceramic
Q
1
= NFET
C
2
= Required 100碌F electrolytic
Specifications
Characteristics
(T
a
=25擄C unless noted)
Output Current
Short Circuit Current
Input Voltage Range
Output Voltage T
olerance
Line Regulation
Load Regulation
V
o
Ripple/Noise
Transient Response
with C
o
= 100碌F
Efficiency
Switching Frequency
Shutdown Current
Quiescent Current
Output Voltage
Adjustment Range
Absolute Maximum
Operating Temperature Range
Recommended Operating
Temperature Range
Thermal Resistance
Storage Temperature
Mechanical Shock
Mechanical Vibration
Weight
Symbols
I
o
I
sc
V
in
1
2
3
4
5
6
7
8
9
10
11
12
V
in
V
in
V
in
GND
GND
GND
GND
V
out
V
out
V
out
V
out
Adj
N
A
C
Pkg Style 200
PT6120
PT6120 SERIES
Conditions
Over V
in
range
V
in
= V
in
min
0.1
鈮?/div>
I
o
鈮?/div>
1.0 A
V
o
= 3.3V
V
o
= 5V
Min
0.1*
鈥?/div>
7
7
Typ
鈥?/div>
3.5
鈥?/div>
鈥?/div>
Max
1.0
鈥?/div>
26
30/38**
Units
A
Apk
V
V
(Note: inhibit function cannot be used with Vin above 30V)
鈭哣
o
Reg
line
Reg
load
V
n
t
tr
V
os
畏
茠
o
I
sc
I
nl
V
o
T
a
T
a
Over V
in
Range, I
o
= 1.0 A
T
a
= 0擄C to +60擄C
Over V
in
range
0.1
鈮?/div>
I
o
鈮?/div>
1.0 A
V
in
=V
in
min, I
o
=1.0 A
50% load change
V
o
over/undershoot
V
in
=9V, I
o
=0.5A, V
o
=3.3V
V
in
=9V, I
o
=0.5A, V
o
=5V
Over V
in
and I
o
ranges
V
in
= 15V
I
o
= 0A, V
in
=10V
Below V
o
Above V
o
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
400
鈥?/div>
鹵1.0
鹵0.25
鹵0.25
鹵2
100
5.0
84
89
500
100
鹵2.0
鹵0.5
鹵0.5
鈥?/div>
200
鈥?/div>
鈥?/div>
鈥?/div>
600
鈥?/div>
%V
o
%V
o
%V
o
%V
o
碌Sec
%V
o
%
%
kHz
碌A(chǔ)
mA
鈥?/div>
10
鈥?/div>
See Application Notes.
-40
鈥?/div>
鈥?/div>
鈥?/div>
50
40
鈥?/div>
500
10
5.0
+85
+85***
+85***
鈥?/div>
鈥?/div>
+125
鈥?/div>
鈥?/div>
鈥?/div>
擄C
擄C
擄C/W
擄C
G鈥檚
G鈥檚
grams
Free Air Convection, V
o
= 3.3V
(40-60LFM)
V
o
= 5V
Free Air Convection
(40-60LFM)
V
o
= 3.3V
V
o
= 5V
-40
-40
鈥?/div>
鈥?/div>
-40
胃
ja
T
s
Per Mil-STD-883D, Method 2002.3
1 msec, Half Sine, mounted to a fixture
Per Mil-STD-883D, Method 2007.2
20-2000 Hz, Soldered in a PC board
鈥?/div>
鈥?/div>
鈥?/div>
* ISR will operate down to no load with reduced specifications.
** Input voltage cannot exceed 30V when the inhibit function is used.
***See Thermal Derating chart.
Note:
The PT6120 Series requires a 100碌F electrolytic or tantalum output capacitor for proper operation in all applications.
4
Power Trends, Inc.
27715 Diehl Road, Warrenville, IL 60555
(800) 531-5782
Fax: (630) 393-6902
http://www.ti.com/powertrends
PT6121C 產(chǎn)品屬性
120
電源 - 板載
DC DC Converters
PT6120
非隔離（POL）
1
38V
5V
-
-
1A
5W
-
-
表面貼裝
12-SIP SMD 模塊
-
托盤
-40°C ~ 85°C
89%
5W
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