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PT5825 Datasheet

  • PT5825

  • 16-A 12-V Input Adjustable Integrated Switching Regulator

  • 10頁(yè)

  • TI

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PT5820 Series
16-A 12-V Input Adjustable
Integrated Switching Regulator
SLTS172
(Released 8/23/2002)
Features
鈥?/div>
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鈥?/div>
鈥?/div>
鈥?/div>
12V Input
DSP Compatible
High Efficiency (90+%)
Output Margin Control (鹵5%)
Adjustable Output Voltage
On/Off Enable Function
Over-Current Protection
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Thermal Shutdown
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Low-Profile (8mm)
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Small Footprint
(0.736 in虜, Suffix 鈥楴鈥?
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Solderable Copper Case
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Surface Mount Compatible
Description
The PT5820 Excalibur鈩?series of integrated
switching regulators (ISRs) combines outstand-
ing power density with a comprehensive list of
features. They are an ideal choice for applications
where board space is a premium and performance
cannot be compromised. These modules provide
a full 16A of output current, yet are housed in a
low-profile, 18-pin, package. The integral copper
case construction requires no heatsink, and offers
the advantages of solderability and a small foot-
print (0.736 in虜 for suffix 鈥楴鈥?. Both through-hole
and surface mount pin configurations are available.
The PT5820 series operates from a 12-V input
bus and provides a convenient point-of-load power
source for the industry鈥檚 latest high-performance
DSPs and microprocessors. The series includes
output voltage options as low as 1.0VDC.
Other features include external output voltage
adjustment, a 鹵5% margin control, on/off enable,
short circuit protection, and thermal shutdown. A
560-碌F input capacitor and 330碌F output capacitor
are required for proper operation.
Ordering Information
PT5827H
PT5821H
PT5822H
PT5823H
PT5824H
PT5825H
PT5826H
= 5.0 Volts
= 3.3 Volts
= 2.5 Volts
= 1.8 Volts
= 1.5 Volts
= 1.2 Volts
= 1.0 Volts
Pin-Out Information
Pin Function
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
V
o
Adjust
Inhibit *
Margin Down
Margin Up
V
in
V
in
V
in
Sense(鈥?
GND
GND
GND
GND
GND
V
out
V
out
V
out
V
out
Sense(+)
PT Series Suffix
(PT1234
x
)
Case/Pin
Configuration
Vertical
Horizontal
SMD
Order
Suffix
Package
Code
(EPP)
(EPQ)
(EPS)
N
A
C
(Reference the applicable package code draw-
ing for the dimensions and PC board layout)
* For Inhibit pin:
Open = output enabled
Ground = output disabled
Standard Application
Margin Down
Margin Up
V
o
Adjust
1
5, 6, 7
4
3
18
14鈥?7
Sense(+)
V
OUT
V
IN
+
PT5820
2
9鈥?3
8
Inhibit
GND
Sense(鈥?
For technical support and more information, see inside back cover or visit www.ti.com
+
L
O
A
D
C
IN
560碌F
(Required)
C
OUT
330碌F
(Required)
GND
C
in
= Required 560碌F
C
out
= Required 330碌F (Note 3)

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