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PSMN004-25B Datasheet

  • PSMN004-25B

  • N-channel logic level TrenchMOS transistor

  • 9頁

  • PHILIPS

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Philips Semiconductors
Product specification
N-channel logic level TrenchMOS鈩?transistor PSMN004-25B, PSMN004-25P
FEATURES
鈥?/div>
鈥橳rench鈥?/div>
technology
鈥?Very low on-state resistance
鈥?Fast switching
鈥?Low thermal resistance
g
SYMBOL
d
QUICK REFERENCE DATA
V
DSS
= 25 V
I
D
= 75 A
R
DS(ON)
鈮?/div>
4.3 m鈩?(V
GS
= 10 V)
R
DS(ON)
鈮?/div>
5 m鈩?(V
GS
= 5 V)
s
GENERAL DESCRIPTION
SiliconMAX
products use the latest Philips Trench technology to achieve the lowest possible on-state resistance in
each package at each voltage rating.
Applications:-
鈥?d.c. to d.c. converters
鈥?switched mode power supplies
The PSMN004-25P is supplied in the SOT78 (TO220AB) conventional leaded package.
The PSMN004-25B is supplied in the SOT404 surface mounting package.
PINNING
PIN
1
2
3
tab
gate
drain
1
source
drain
DESCRIPTION
SOT78 (TO220AB)
tab
SOT404 (D
2
PAK)
tab
2
1 23
1
3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
V
DSS
V
DGR
V
GS
V
GSM
I
D
I
DM
P
D
T
j
, T
stg
Drain-source voltage
Drain-gate voltage
Continuous gate-source
voltage
Peak pulsed gate-source
voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
CONDITIONS
T
j
= 25 藲C to 175藲C
T
j
= 25 藲C to 175藲C; R
GS
= 20 k鈩?/div>
T
j
鈮?/div>
150 藲C
T
mb
= 25 藲C; V
GS
= 5 V
T
mb
= 100 藲C; V
GS
= 5 V
T
mb
= 25 藲C
T
mb
= 25 藲C
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
25
25
鹵
15
鹵
20
75
2
75
2
240
230
175
UNIT
V
V
V
V
A
A
A
W
藲C
1
It is not possible to make connection to pin:2 of the SOT404 package
2
maximum continuous current limited by package
October 1999
1
Rev 1.100

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