PSD913F2
PSD934F2 PSD954F2
Flash In-System Programmable (ISP) Peripherals
For 8-bit MCUs
PRELIMINARY DATA
FEATURES SUMMARY
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Single Supply Voltage:
鈥?5 V鹵10% for PSD9xxF2
鈥?3.3 V鹵10% for PSD9xxF2-V
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Figure 1. Packages
Up to 2Mbit of Primary Flash Memory (8 uniform
sectors)
256Kbit Secondary Flash Memory (4 uniform
sectors)
Up to 256Kbit SRAM
Over 2,000 Gates of PLD: DPLD
27 Reconfigurable I/O ports
Enhanced JTAG Serial Port
Programmable power management
High Endurance:
鈥?100,000 Erase/Write Cycles of Flash Memory
鈥?1,000 Erase/Write Cycles of PLD
PQFP52 (T)
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PLCC52 (K)
January 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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