PRISM鈩?2.4GHz Chip Set
Data Sheet
August 1997
File Number
4063.6
Direct Sequence Spread Spectrum
Wireless Transceiver Chip Set
The Intersil 2.4GHz PRISM鈩?chip set is
a highly integrated six-chip solution for
RF modems employing Direct Sequence
Spread Spectrum (DSSS) signaling.
Significant integration of transmit and
receive functions employ the following ICs: complete integrated
DSSS engine, the HFA3824; a quadrature
modulator/demodulator, integrated with an IF limiter amplifier
with RSSI, the HFA3724, HFA3726; a combined LNA/Mixer
and upconverter/preamplifier, the HFA3624; a high
performance, low noise amplifier for increased receiver
sensitivity, the HFA3424; a dual synthesizer, the HFA3524 and
a monolithic RF power amplifier, the HFA3925. Each of the
functions may be used individually or in any combination in
support of a variety of RF modem applications.
鈩?/div>
Features
鈥?Provides Antenna-to-Bits鈩?Data Stream
鈥?Low Voltage Operation from 2.7V to 5.5V
鈥?2.4GHz - 2.5GHz ISM Band Operation
鈥?Single Heterodyne Conversion
鈥?Programmable Antialiasing and Shaping Filters
鈥?10MHz to 400MHz IF Operation with RSSI
鈥?Autonomous Half Duplex Direct Sequence Modem
鈥?Selectable DBPSK, DQPSK Signalling
鈥?Antenna Diversity Selection
鈥?Direct Sequence Physical Layer (DS-PHY)
鈥?Differential Data Encoding/Decoding
鈥?Programmable 16-Bit PN Code
鈥?Data Rates up to 4 MBPS DQPSK
鈥?Power Management Control
鈥?Low Pro鏗乴e PCMCIA-Compatible Surface Mount
Packaging
The PRISM鈩?chip set is intended to support various data
rates including systems targeting the proposed IEEE 802.11
standard 鈥淒irect Sequence Physical layer (DS-PHY)鈥?
Differential BPSK and QPSK signaling is employed with
differential encoding and decoding of packetized data. A PN
sequence rate of up to 22 MCPS is supported for up to a 16
chip PN code. Integrated programmable low pass filters are
used on the HFA3724 to allow chip rates from 2.75 MCPS to
22 MCPS. A flexible general purpose data and control
interface is provided for parameter configuration and for
transferring data packets between the PHY and Media Access
Control (MAC) layers. Data rates of up to 2 MBPS for DBPSK
and 4 MBPS for DQPSK are supported.
Applications
鈥?Systems Targeting IEEE 802.11 Standard
鈥?PCMCIA Wireless Transceiver
鈥?WLAN RF Modems
鈥?TDMA Packet Protocol Radios
鈥?Part 15 Compliant Radio Links
Typical Application Diagram
HFA3724, HFA3726
(FILE# 4067, 4310)
TUNE/SELECT
HFA3824
(FILE# 4308)
RXI
DATA TO MAC
CTRL
SPREAD
DPSK
MOD.
PRISM鈩?CHIP SET FILE #4063
HFA3424
(NOTE)
(FILE# 4131)
A/D
DE-
SPREAD
DPSK
DEMOD
HFA3624
UP/DOWN
CONVERTER
(FILE# 4066)
I
RXQ
A/D
CCA
802.11
MAC-PHY
INTERFACE
梅
2
0
o
/90
o
M
U
X
M
U
X
RSSI
A/D
TXI
RFPA
HFA3925
(FILE# 4132)
VCO
VCO
TXQ
Q
QUAD IF MODULATOR
DUAL SYNTHESIZER
DSSS BASEBAND PROCESSOR
HFA3524/A
(FILE# 4062)
NOTE: Required for systems targeting 802.11 speci鏗乧ations.
2-5
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
漏
Intersil Corporation 1999
PRISM廬 is a registered trademark of Intersil Corporation. PRISM logo is a trademark of Intersil Corporation.
Antenna to Bits鈩?is a trademark of Intersil Corporation.
INTERSIL
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