POWERING INTEL'S PENTIUM II
MICROPROCESSOR
March 11, 1998
AN97-1
TEL:805-498-2111 FAX:805-498-3804 WEB:http://www.semtech.com
Powering Intel's Pentium II Microprocessor using the SC1151CS and the MP60-F VRM
Introduction
Modern microprocessors demand more and more
stringent requirements from their power sources. De-
creasing working voltages, increasing current draw
and faster changes in load demand all combine to
make the power supply designer鈥檚 life more interest-
ing. These requirements also mandate the use of local
regulation or voltage conversion as close as possible
to the microprocessor itself.
Intel has defined the power requirements for their
Pentium II microprocessor and Semtech has designed
the SC1151CS single chip PWM controller to meet
those requirements. Semtech has also designed the
MP60-F Voltage Regulator Module (VRM) both to
demonstrate the SC1151CS and also to serve as a
plug-in VRM solution for those not wishing to develop
an on-board solution.
This application note describes the SC1151CS, it鈥檚
design philosophy and practical use in a Pentium II
power supply application.
C
ESL
ESR
Fig.1 Output Capacitor with parasitics
Vo
ESR
RECOVERY OF PROPERLY DESIGNED CIRCUIT
Design Criteria
Output Filter Components
Probably the most striking design criterium for a
power system to meet Pentium II requirements is the
need to maintain regulated output voltage during very
fast load transients. It is impossible for even the
fastest PWM controller to respond to the required load
transient in the time available. This means that short
term transient load requirements will have to be met
using the output capacitors of the power system. Un-
fortunately all practical capacitors have parasitic char-
acteristics, the most important of which for our pur-
poses are
a) Equivalent Series Resistance (ESR)
b) Equivalent Series Inductance (ESL)
The output capacitor equivalent circuit is shown in
Fig.1. The combined effect of all these parasitics dur-
ing a fast increase in load current is shown in Fig.2
The ESR of the capacitor causes a downward volt-
age step (together with a short spike due to ESL). The
output circuit of the converter must be designed so
that the additional output voltage sag caused by dis-
charging output capacitors is offset by the reducing
ESR drop due to less current demanded from the out-
put capacitors. In simple terms we are looking for low
ESR, high capacitance and low inductance in the con-
verter output circuit.
ESL
RECOVERY OF IMPROPERLY
DESIGNED CIRCUIT
Io
INDUCTOR CURRENT
Fig.2 Output Voltage during load transient
The choice of output capacitors therefore be-
comes very important. The first criteria is that ESR
should be less than 10m鈩?to keep the leading edge
transient to less than 120mV for a 12A load tran-
sient. The choice of cost and technology leads to
three approaches.
a) Multiple aluminum electrolytic capacitors - typi-
cally to meet ESR requirements 7x1000碌F will be re-
quired.
b) Multiple OS-CON type capacitors - this ap-
proach typically results in 4x330碌F but at approxi-
mately 5x the cost of a).
c) Multiple tantalum chip capacitors - typically 10
to 20 giving a total output capacitance of 1000 to
2000碌F and an even higher cost solution than b).
Pentium II Processor is a trademark of Intel Corp.
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漏 1998 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
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