QuadPHY-II鈩?/div>
4-Channel 2.125, 2.5 and 3.125 Gbit/s Transceiver with Half-rate Support
GENERAL DESCRIPTION
The QuadPHY-II is a physical layer
transceiver ideal for systems requiring
high speed point-to-point communi-
cation links. It is applicable for PMA-
PMD connections in 10 GE, Infiniband 1
or 4 x 2.5 Gbit/s links, 1 and 2 Gbit/s
Fibre Channel, as well as high speed
serial backplanes for high capacity
systems.
SERIAL I/O
鈥?Redundant high speed serial I/O
channels for convenient switching to
redundant fabric.
鈥?High speed outputs with optional pre-
emphasis to drive longer backplanes.
鈥?High speed I/O with on-chip
termination resistors to directly drive
dual-terminated 50 Ohm lines.
TEST FEATURES
鈥?Extensive control of loopback, BIST,
and operating modes via 802.3
compliant MDC/MDIO serial interface.
鈥?On-chip packet generator/checker-
provides at-speed diagnostics.
鈥?Built-in error counters per channel.
鈥?Support for IEEE 1149.1 JTAG testing
on all pins.
FEATURES
GENERAL
鈥?10Gbit/s, bi-directional, XAUI to XGMII
link supporting the proposed IEEE
802.3ae (the standard is draft and is
subject to change).
鈥?Four independent 2.125, 2.5 and 3.125
Gbit/s Serdes for Fibre Channel,
Infiniband, 10 GE line cards and high-
speed backplane applications.
鈥?Half/Full rate mode selectable per
channel.
鈥?Integrated serializer/ deserializer, clock
synthesis, clock recovery and 8B/10B
encode/decode logic.
鈥?Under 2 Watts typical power.
PARALLEL I/O
鈥?10-bit Dual Data Rate (DDR) parallel
interface.
鈥?Selectable source simultaneous or
source synchronous transmit and
receive parallel interfaces.
鈥?Convenient output clock for user
friendly ASIC timing.
鈥?Interoperates with SSTL2 and 1.8V
LVCMOS standard.
PHYSICAL
鈥?1.8V, 0.18 micron standard CMOS
technology with 2.5V tolerant I/O.
鈥?289-ball PBGA (19mm x 19mm
package).
APPLICATIONS
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
High speed serial backplanes
10 GE links
Fibre Channel transceivers
Infiniband transceivers
XAUI retimers
Intra-system interconnect
TRUNKING &TIMING
鈥?Integrated Receive FIFO synchronizes
incoming data to local clock domain.
鈥?Trunking feature de-skews and aligns
all four channels to form a single 10
Gbit/s logical link.
BLOCK DIAGRAM
Transmit Channel A (1 of 4)
TXD[9:0]
TDOXP/
TDOXN
TDOYP/
TDOYN
(per channel)
2
Serializer
2
TXCLK
(shared)
Receive Channel A (1 of 4)
10B/8B Decoder
8 or 10
FIFO & Trunking
Logic
RXD[9:0]
(per channel)
9 or 10
RXCLK
(per channel)
10
8B/10B Encoder
FIFO & /A/
insert
Adaptive
Sampler
(per channel)
9 or 10
RDIXP/
RDIXN
RDIYP/
RDIYN
(per channel)
2
Clock Recovery
2
Deserialize & Byte
Align
Common Control Logic
RESET,
MDC, MDIO
Mode strapping pins
JTAG interface
BIST pins
Clock Synthesizer
SYSCLK
(1x or 2x rate)
PLL_LOCK
SYSCLK RATE
PMC-2000791 (A4)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS鈥?INTERNAL USE
REFCLK
漏 Copyright PMC-Sierra, Inc. 2001
PM8355相關(guān)型號(hào)PDF文件下載
-
型號(hào)
版本
描述
廠商
下載
-
英文版
Analog IC
ETC
-
英文版
Analog IC
ETC
-
英文版
Analog IC
ETC
-
英文版
TEMUX 336 High Density T1/E1 Framer, VT/TU Mapper & M13 Mux ...
PMC-Sierra, Inc
-
英文版
TEMUX 168 High Density T1/E1 Framer, VT/TU Mapper & M13 Mux ...
PMC-Sierra, Inc
-
英文版
High-Density 32-Channel T1/E1/J1 Framer with Integrated VT/T...
PMC-Sierra, Inc
-
英文版
M13 Multiplexer/Demultiplexer
PMC
-
英文版
M13 Multiplexer/Demultiplexer
PMC [PMC-S...
-
英文版
M13 MULTIPLEXER
PMC [PMC-S...
-
英文版
HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M...
PMC
-
英文版
High Density T1/E1 Framer with Integrated VT/TU Mapper and M...
PMC [PMC-S...
-
英文版
HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M...
PMC [PMC-S...
-
英文版
High Density 84-Channel T1/E1/J1 Framer with Integrated VT/T...
PMC
-
英文版
High Density 84-Channel T1/E1/J1 Framer with Integrated VT/T...
PMC [PMC-S...
-
英文版
8-Channel 1.0-1.25 Gbps Transceiver
PMC
-
英文版
8-Channel 1.0-1.25 Gbps Transceiver
PMC [PMC-S...
-
英文版
4-Channel 1.0-1.25 Gbps Transceiver
PMC
-
英文版
4-Channel 1.0-1.25 Gbps Transceiver
PMC [PMC-S...
-
英文版
4-Channel 2.125, 2.5 and 3.125 Gbit/s Transceiver with Half-...
PMC
-
英文版
4-Channel 2.125, 2.5 and 3.125 Gbit/s Transceiver with Half-...
PMC [PMC-S...
1
2
