PM5319
ARROW 622
Released
SONET/SDH Interface for 622 & 155 Mbit/s
FEATURES
SONET/SDH INTERFACE
鈥?Interface rate software selectable
between OC-3/STM-1 (155.52 Mbit/s)
and OC-12/STM-4 (622.08 Mbit/s)
rates
鈥?Integrated clock recovery & synthesis
allows direct interface to low-cost
optical transceivers
鈥?Integrated clock synthesis generates
line clock from 77.76 MHz reference
鈥?Complies with Bellcore, ANSI, and ITU
specifications for Jitter Tolerance and
Jitter Generation
鈥?High order path processing and
alignment to STS-1/AU-3/TU-3 level
鈥?Full access to all SONET/SDH
Transport overhead bytes via a
dedicated serial port
鈥?Full access to all SONET/SDH STS-
1/AU-3/TU-3 path overhead bytes via a
dedicated serial port
鈥?Full access to all DCC bytes via a
dedicated serial interface
鈥?Ring Control port provides real time
detection of error conditions and
insertion of alarms such as AIS & RDI
鈥?Section and Path Trace filter and
monitor checks for Trace Identifier
Mismatch (TIM) and Trace Identifier
Unstable (TIU) conditions
GENERAL FEATURES
鈥?Provides an industry standard 8-bit,
77.76 MHz telecombus interface
鈥?Multi-drop capability allows multiple
devices to share the add/drop bus for
redundancy or multiplexing purposes
鈥?Full Time Slot Interchange (TSI) allows
flexible mixing of traffic from the
SONET/SDH and DS3/E3/EC-1
Interfaces
鈥?Supports diagnostic 2
23
-1 pseudo-
random bit-sequence (PRBS)
generation and monitoring
鈥?Provides a standard JTAG test-port for
boundary scan board-test purposes
鈥?Provides a generic 16-bit
microprocessor interface for control
and monitoring
鈥?15x15mm 196 ball CABGA package
allows for flexible placement and
routing
DS3/E3/EC-1 INTERFACE
鈥?Flexible three-port DS3/E3/EC-1
Interface
鈥?Supports clear channel
mapping/demapping of DS3 or E3
into/from STS-1, AU-3, or TU-3
鈥?Fully digital desynchronizers require
no external PLLs for standards-
compliant operation
鈥?Integrated desynchronization CSU
allows low rate reference clock at
44.736 MHz, 34.368 MHz, or 51.84
MHz
鈥?Bi-directional digital jitter attenuation
for DS3 and E3 streams allows
interfacing to low cost LIUs
鈥?Full bi-directional performance
monitoring for DS3, E3, and EC-1
streams
鈥?Full access to DS3/E3/EC-1 Overhead
bytes
APPLICATIONS
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鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
SONET/SDH Add/Drop Multiplexers
Terminal Multiplexers
Customer Premise Equipment
Media Gateways
Multiservice Provisioning Platforms
Channelized Router Interfaces
Digital Cross-Connects
BLOCK DIAGRAM
PMON
DS3 PRBS
Generator
& Checker
DS3/E3/EC-1
Overhead
Insert/Extract
Microprocessor
Interface
JTAG
Interface
Clock + Data
Interface
to LIU
DS3/E3/EC-1Interface (x3)
Interface
DS3/E3/EC-1
Interface (x3)
(x3)
DS3/E3/EC-1
Telecom Bus Interface
DS3
Framer
E3
Framer
EC-1
Section/
Line/Path
Bit Error
Rate
Monitor
Rx TSI
8x77.76 MHz
Multi-drop
Telecom Bus
Framer
Path
Processor
TU3 Path
Processor
Aligner
TxTSI
Serial PECL Interface
to 155 or 622 Mbit/s
Optical Transceiver
SONET/SDH Interface
PRBS
Generator
& Checker
Ring Control
Port
Alarm
Processing
Bit Error
Rate
Monitor
SONET/SDH
Overhead
Insert/Extract
PMC-2030426
Issue 3
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC.,
AND FOR ITS CUSTOMERS鈥?INTERNAL USE
漏 Copyright PMC-Sierra, Inc. 2004
All rights reserved.
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