PMC-Sierra,Inc.
STS-12 (STM-4) applications.
byte-serial mode.
鈥?Compatible with PM5355 S/UNI-622錚?/div>
physical layer interface, PM5344
SPTX SONET/SDH Path Terminating
Transceiver, and with commercially
available 622 Mbit/s serial-to-parallel
conversion devices.
鈥?Performs byte-interleaved multiplexing
of lower-rate, drop-side, SONET/SDH
data streams.
鈥?Optionally inserts the framing bytes
(A1 and A2) and the STS identification
bytes (C1) in to the transmit stream.
鈥?Performs frame synchronous
descrambling and scrambling.
鈥?Compares the bit-interleaved parity
error detection codes (B1 and B2) for
the receive stream. Inserts B1 and B2
in the transmit stream.
鈥?Inserts line Far-End Block Errors
(FEBEs) into the Z2 growth byte based
on received B2 errors.
鈥?Accumulates near-end errors (B1 and
B2) and far-end errors (Z2).
鈥?Extracts and inserts the order wire
channels (E1 and E2).
鈥?Extracts and inserts the data
communications channels (D1-D3 and
D4-D12).
鈥?Extracts and inserts the section user
channel (F1).
鈥?Extracts and inserts the Automatic
Protection Switch (APS) channel (K1
and K2). The receive APS bytes are
also filtered and extracted into internal
registers.
鈥?Detects Loss Of Signal (LOS), Out Of
Frame (OOF), Loss Of Frame (LOF),
Far-End Receive Failure (FERF), line
Alarm Indication Signal (AIS), and
protection switching byte failure
alarms.
鈥?Inserts FERF and AIS in the transmit
stream.
鈥?Provides LOS insertion, framing
pattern error insertion, and coding
violation insertion (B1 and B2) for
diagnostic purposes. B1 and B2 error
can also be generated 鈥渙n-the-fly鈥?/div>
using an error insertion mask.
鈥?Provides a transmit and receive ring
control port, allowing alarm and
maintenance signal control and status
to be passed between mate STTXs for
applications in ring-based add/drop
multiplexers.
鈥?Low power, +5 V, CMOS technology.
Device has TTL/CMOS-compatible
inputs and outputs.
鈥?Available in a high performance 208-
pin copper slugged (28 by 28 mm)
Plastic Quad Flat Pack (PQFP)
package.
APPLICATIONS
OC-N to OC-M Multiplexers
SONET/SDH Add/Drop Multiplexers
SONET/SDH Terminal Multiplexers
ATM Transmission Systems
Broadband ISDN User Network
Interfaces (UNIs)
鈥?SONET/SDH Test Equipment
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
BLOCK DIAGRAM
RLAIS/TRCPCLK
TLAIS/TRCPDAT
TFERF/TRCPFP
Line Side
System Side
SCPO[5:0]
TTOH[4:1]
TTOHFP
TTOHCLK
TTOHEN
TOWCLK
SCPi[3:0]
TSDCLK
TSOW
TSUC
GTICLK
TSD
TCLK
Status Control
Port
Transmit
Ring Control
Port
TOFP
TOUT[7:0]
TSOUT
TSICLK
RICLK
RIFP
RIN[7:0]
RSIN
RSICLK
TDIS
TIFP
Transmit Section
(Regenerator Section)
O/H Processor
Par/Ser
Transmit Line
(Multiplexer Section)
O/H Processor
Byte
Interleaved
Multiplex
Transmit
O/H
Access
TICLK
TIN4[7:0]
TIN3[7:0]
TIN2[7:0]
TIN1[7:0]
ROFP
ROCLK
Receive Section
(Regenerator
Section)
O/H Processor
Ser/Par
Receive Ring
Control Port
Receive Line
(Multiplexer Section)
O/H Processor
Byte
Interleaved
Demultiplex
ROUT4[7:0]
ROUT3[7:0]
ROUT2[7:0]
ROUT1[7:0]
Microprocessor
Interface
Receive O/H
Access
D[7:0]
A[4:0]
A[5]/SCSB
ALE
CSB/LCSB
WRB
RDB
RSTB
INTB/LINTB
SINTB
SLIM
RTOHFP
LAIS/RRCPDAT
ERF/RRCPCLK
LOS/RRCPFP
RAPSCLK
PMC-931128 (R6)
錚?/div>
1998 PMC-Sierra, Inc. September, 1998
RTOHCLK
RTOH[4:1]
RLDCLK
RLOW
RLD
B2E
RSDCLK
RSD
RSUC
ROWCLK
RSOW
RAPS
LOF
OOF
B1E
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