PM4341A
Summary Information
T1 TRANSCEIVER
FEATURES
鈥?Monolithic single chip device which
integrates a full featured T1 framer
with an on-chip analog line interface.
鈥?Supports SF, ESF, T1DM (DDS) and
SLC廬96 format DS1 signals.
Supports unframed mode. Supports
B8ZS or AMI line codes.
鈥?Recovers clock and data from the
incoming DSX-1 signal, generates
DSX-1 output signal.
鈥?Supports transfer of PCM and
signalling to/from 1.544 Mbit/s and
2.048 Mbit/s backplane buses.
Supports gapped data streams used
in higher rate multiplexing.
鈥?Provides robbed bit signalling
insertion/extraction, idle code
substitution, digital milliwatt code
substitution, data inversion and 2
superframes of signalling debounce
on a per channel basis.
鈥?Pin compatible with the PM6341
E1XC E1 Transceiver.
鈥?Software compatible with the
PM4344 TQUAD Quad T1 Framer
and PM4388 TOCTL Octal T1
Framer.
鈥?Provides an 8-bit microprocessor bus
interface for configuration, control
and status monitoring.
鈥?Low-power 5V CMOS technology.
鈥?Avalable in a high density 80-pin (14
by14mm) PQFP or in a 68-pin PLCC
package.
T
1XC
RECEIVE SECTION
鈥?Provides loss of signal, red alarm,
yellow alarm and AIS alarm
indication. Detects violations of the
ANSI T1.403 12.5% pulse density
rule over a moving 192 bit window.
鈥?Supports line and path performance
monitoring per Bellcore, AT&T and
ANSI recommendations.
鈥?Accumulators are provided for ESF
CRC-6 and framing bit errors, Line
Code Violations and Loss Of Frame
or Change Of Frame Alignment
events.
鈥?Extracts the data link in ESF, T1DM
and SLC廬96 formats. Extracts the
D-channel for primary rate interfaces.
鈥?Provides ESF bit-oriented code
detection and an HDLC interface for
terminating the ESF datalink.
鈥?Provides a 2 frame elastic store for
jitter and wander attenuation.
鈥?Detects programmable in-band
loopback codes.
TRANSMIT SECTION
鈥?Provides per channel minimum ones
density through Bell (Bit 7), GTE or
DDS zero code suppression.
鈥?Detects violations of the ANSI T1.403
12.5% pulse density rule over a
moving 192 bit window.
鈥?Inserts the data link in ESF, T1DM
and SLC廬96 formats. Inserts the D-
channel for primary rate interfaces.
鈥?Generates AIS and yellow alarm in
all formats.
鈥?Inserts the data link in ESF, T1DM
and SLC廬96 formats. Inserts the D-
channel for primary rate interfaces.
鈥?Generates ESF bit-oriented codes
and provides an HDLC interface for
generating the ESF datalink.
鈥?Inserts programmable in-band
loopback codes.
鈥?Provides a FIFO buffer for jitter
attenuation and rate conversion.
BLOCK DIAGRAM
TCLK I
TR A NS M ITT E R
BT PCM /BTD P
BTSIG/B TDN
BT FP
BTCL K
BT IF
BACK-
PLA NE
TRANS M IT
INTER-
FAC E
XB AS
BASICT RANS M IT TER :
FRAM E GENERA TION ,
ALARM INS E RT ION ,
TRUN K CON DITIO NING
LINE CO DING
TO P S
TIM ING OP TIONS
DJ AT
DIG ITAL JIT TER
ATTE NU ATO R
XPLS
ANALO G DS X-1
PULS E
GE NE RATOR
TA P
TA N
TPSC
PER-C HA N
CO NT :
SIG ,IDL E,
ZE RO CONT
X IB C
IN-BA ND
LO OP BACK
CO DE
GE NE RATOR
TC
A(7-0)
RD B
WRB
CS B
M P IF
M ICRO -
PROCE SS-
OR
INT ERFACE
XBO C
BIT -
ORIENTED
CO DE GEN .
APPLICATIONS
鈥?T1 & T3 Multiplexers
鈥?T1 Frame Relay Interfaces
鈥?T1 ATM UNI Interfaces
鈥?Fractional T1
鈥?T1 Channel Service Units (CSUs)
and Data Service Units (DSUs)
鈥?Digital Access and Cross-Connect
Systems (DACS) and Electronic
Digital Cross-Connects (EDSX)
鈥?Digital Loop Carriers (DLCs)
鈥?SONET Add-Drop Multiplexers
(ADM)
鈥?ISDN Primary Rate Interfaces (PRI)
鈥?Digital Private Branch Exchanges
(PBX)
鈥?T1 & T3 Test Equipment
SLC廬96 is a registered trademark of AT&T
XPD E
PULSE
DE N SIT Y
ENFOR CE R
DT IF
DIG IT AL DS -1
TRANSM IT
INT ERF ACE
TCL KO
TDP/T DD
TDN/T FLG
ALE
INT B
RS T B
X F DL
HDLC
TRANS -
M ITT E R
TDLCLK /
TDL UD R
TDLSIG/
TDLINT
D(7-0)
BRCLK
RE CE IV E R
BRF PI
XCLK /VCLK
PMO N
PER-
FOR M ANCE
M ONIT OR
CO UNT E RS
E LS T
ELAST IC
ST ORE
S IG X
SIG NA LLING
EXTR ACT-
OR
RA S
RE F
R RC
RS L C
ANA LO G
DS X-1 PULSE
SLICER
BRPCM /BR DP
BR IF
BA CK-
PLAN E
RE CE IV E
INTER-
FA CE
BRSIG /B RD N
BRFPO
RC L K I
RD P/RDD /
SD P
RD N/RL CV /
S DN
DR IF
DIG ITAL
DS -1 RX
INTER-
FAC E
CDRC
CL O CK AND
DA T A
RE CO VERY
FR M R
F RAM ER:
FRA M E
ALIGNM ENT ,
ALARM
EXT RA CT
FR A M
FRA M ER/
SLIP BUFFE R
R AM
RPSC
PER -CHANN EL
CON TROL:
TRUNK
CO ND ITION
RDP CM /RPC M
RCLK O
RF P
IB C D
IN-BAND
LO OP BACK
CO DE
DE TE CTO R
PDVD
PULS E
DE NS ITY
VIO LATION
DE TEC TOR
AL M I
ALARM
INT E-
GR ATOR
RB O C
BIT -
ORIENTED
CO D E
DE TECTO R
RF D L
HDLC
RE CE IV ER
RD LS IG/
RD LINT
RD LCLK/
RD LEO M
PMC-920108(R7)
漏 1998 PMC-Sierra, Inc. March, 1998
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