PM4325
OCTLIU ST
Octal Short Haul T1/E1/J1 Low Latency Transport Line Interface
FEATURES
鈥?Monolithic device integrating eight
T1/J1 or E1 short haul line interface
units.
鈥?Software switchable between T1/J1
and E1 operation on a per-device
basis.
鈥?Meets or exceeds T1/J1 and E1 short
haul network access specifications
including ANSI T1.102, T1.403,
T1.408, AT&T TR 62411, ITU-T G.703,
G.704 as well as ETSI 300-011, TBR
4, TBR 12, and TBR 13. In conjunction
with the TEMAP 84 (PM5366), allows
Add Drop Multiplexers and Terminal
Multiplexers to meet GR253, GR496,
and G.783.
鈥?Optional encoding/decoding of B8ZS,
HDB3, and AMI line codes.
鈥?Provides receive equalization, clock
recovery, and line performance
monitoring.
鈥?Provides transmit and receive jitter
attenuation.
鈥?Provides digitally programmable pulse
templates.
鈥?Provides a selectable, per channel
independent de-jittered T1 or E1
recovered clock for system timing and
redundancy.
鈥?Provides PRBS generators and
detectors on each tributary for error
testing at DS1 and E1 rates as
recommended in ITU-T O.151.
鈥?Uses line rate system clock.
鈥?Recovers clock and data using a digital
phase locked loop for high jitter
tolerance.
鈥?Tolerates more than 0.4 UI peak-to-
peak high frequency jitter as required
by AT&T TR 62411 and Bellcore
TR-TSY-000170.
鈥?Outputs dual rail recovered line pulses,
a single rail DS-1/E1 signal, or parallel
data in SBI/SBI TR bus format.
鈥?Performs B8ZS or AMI decoding when
processing a bipolar DS-1 signal and
HDB3 or AMI decoding when
processing a bipolar E1 signal.
鈥?Detects line code violations (LCVs),
B8ZS/HDB3 line code signatures, and
four (E1), eight (T1+B8ZS), or sixteen
(T1 AMI) successive zeros.
鈥?Provides a programmable depth FIFO
buffer for jitter attenuation, rate
conversion, and latency optimization in
the receive path.
SYSTEM INTERFACE
鈥?Supports transfer of transmitted single
rail PCM and signaling data from
1.544 Mbit/s and 2.048 Mbit/s
backplane buses or a SBI/SBI TR
interface for low pin count
interconnection of up to 11 OCTLIU
STs to the high-density PM5366
TEMAP 84 T1/E1 framer.
RECEIVE SECTION
鈥?Supports T1/E1 signal reception for
distances with up to 12dB of cable
attenuation at nominal conditions using
PIC 22 gauge cable emulation.
鈥?Supports G.772 compliant
non-intrusive protected monitoring
points.
TRANSMIT SECTION
鈥?Generates DSX-1 short haul pulses
with programmable pulse shape
compatible with AT&T, ANSI, and ITU
requirements.
BLOCK DIAGRAM
TDN[8:1]
TDP[8:1]
TCLK[8:1]
DSYNC
DDATA[7:0]
SBI TR
Extract
DLINKRATE[5:0]
DPARITY
DALARM
DVALID
DFULL
DC1FP
DDATA[7:0]
DDP
DPL
DV5
PMON
Performance
Monitor
(Line
Loopback)
SBI
Insert
PDVD
Pulse Density
Viol. Detector
IBCD
Inband Loop
back Code
Detector
RJAT
Digital Jitter
Attenuator
SIPO
PRBS
Pattern
Generator /
Detector
REFCLK
C1FPOUT
ADATA[7:0]
ADP
APL
AV5
AACTIVE
AC1FP
ADATA[7:0]
ALINKRATE[5:0]
APARITY
AALARM
AVALID
ASYNC
RDP[8:1]
RDN/RLCV[8:1]
RCLK[8:1]
LOS
TXHIZ/LineLB
SBI_EN
RSTB
Serial
Output
JTAG
uP Interface
H/W only
Auto-config
TXTIP1[8:1]
TXRING1[8:1]
TXRING2[8:1]
XLPG
Transmit LIU
TJAT
Digital Jitter
Attenuator
LCODE
AMI / B8ZS /
HDB3 Line
Encoder
XPDE
Pulse Density
Enforcer
XIBC
Inband Loop-
back Code
Generator
PISO
(Diagnostic
Digital
Loopback)
SBI
Extract
RXTIP[8:1]
RLPS
Receive LIU
RXRING[8:1]
CDRC
Clk/Data
Recovery
SBI TR
Insert
LIU Octant x 8
CSD
XCLK
RSYNC
Clock
Synthesis /
Distribution
TOPS
Timing
Options
TDI
ALE
CSB
WRB
RDB
INTB
LOS
TCK
TMS
TDO
SREN
D[7:0]
A[10:0]
SRCLK
SRCDO
SRCEN
LOS_L1
TRSTB
SRDO/PI
SRDI/PO
SRCASC
SRCCLK
SRCODE
LEN8[2:0]
LEN7[2:0]
LEN6[2:0]
LEN5[2:0]
LEN4[2:0]
LEN3[2:0]
LEN2[2:0]
LEN1[2:0]
HW_ONLY
PMC-2030527 (R2)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS鈥?INTERNAL USE
漏 Copyright PMC-Sierra, Inc. 2003
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