PMC-Sierra,Inc.
Preliminary
鈥?Filtering and switching at wire rates (up
to 148,8000 packets per second),
supporting a mix of Ethernet and
IEEE 802.3 protocols.
鈥?Expansion port supports a peak
system bandwidth of 1 Gbit/s, and is
compatible with industry-standard PCI
bus (version 2.1).
鈥?Performs all address learning, address
table management, and aging
functions for up to 32,768 MAC
addresses (limited by external
memory). Address learning rate of up
to 10,000 addresses per second.
鈥?Maximum broadcast/multicast at wire
rates with configurable broadcast
storm rate limiting.
鈥?Low-latency operation in both unicast
and broadcast modes.
鈥?Configuration, management, MIB
statistics, and diagnostics available in-
band.
鈥?Store-and-forward operation with full
error checking and filtering.
PM3351
ELAN 1x100
鈥?Flow control supported for both full-
duplex and half-duplex operation;
supports IEEE 802.3x PAUSE frame
flow control in full-duplex mode, and
supports user-enabled backpressure
flow control in half-duplex mode.
鈥?Maintains and collects per-port and
per-host statistics at wire rates.
鈥?Interfaces directly to industry-standard
100 Mbit/s transceivers with no glue
logic via the built-in Medium
Independent Interface (MII) port with
full support for the autonegotiation
function implemented by the PHY
devices.
鈥?Fully static CMOS operation at 50 MHz
clock rates.
鈥?Implemented with a 3.3 V core and a
5 V-compatible I/O.
鈥?Available in a 208-pin PQFP package.
Single-Port 10/100 Mbit/s Ethernet Switch
FEATURES
鈥?Single-chip, 1-port, full-duplex or half-
duplex, 10/100BaseT switching device
for low-cost unmanaged and managed
networks.
鈥?On-chip SmartPath鈩?50 MHz RISC
CPU core, multi-channel DMA
controller, MAC-layer interface logic,
FIFOs, PCI-based expansion port, and
a flexible memory controller.
鈥?CPU supports background applications
running on local OS (e.g., SNMP), and
real-time data-oriented applications
(e.g., packet forwarding and filtering
decisions).
鈥?Performs packet switching at a rate of
200 Mbit/s (full-duplex) or 100 Mbit/s
(half-duplex).
鈥?Fully compatible with the PM3350
8-port 10 Mbit/s switch device; may be
used to create a compact and
inexpensive mixed 10/100 Mbit/s
switching hub.
BLOCK DIAGRAM
50 MHz
Embedded
RISC CPU
I
D
Cache Cache
PCI Expansion
Bus
PCI Bus
Interface
Transmit
Channel Logic
Receive DMA
Controller
Transmit
FIFO
Receive
FIFO
100BaseT
Transmit MAC
100BaseT
Receive MAC
100BaseT
MII Interface
Expansion
Registers
External
Memory
Interface
SRAM/EPROM
PMC-970278 (P4)
漏
脙
1998 PMC-Sierra, Inc. October, 1998
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