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PCI Bus Master Interface supporting adapters and
embedded systems
Two independent DMA channels for local bus
memory to/from PCI host bus data transfers
Four bi-directional FIFOs for zero wait-state burst
operation; one for each DMA channel, one for Direct
Master interface and one for slave interface
PCI Bus Master transfers up to 132 MBytes/sec
Supports both multiplexed and non-multiplexed local
buses, 32, 16 or 8 bit. May connect directly to Intel
i960廬Cx, Hx, Jx, Kx and Sx processors
Local bus can run asynchronously to the PCI clock.
Eight 32 bit mailbox and two 32 bit doorbell registers
Low power CMOS in 208 Pin Plastic QFP Package
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Figure 1. Typical Adapter or Embedded System Block Diagram
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PLX Technology, Inc., 1995
PLX Technology, Inc., 625 Clyde Avenue, Mountain View, CA 94043 (415) 960-0448 FAX (415) 960-0479
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