P
RODUCT
B
RIEF
Infineon's Purple (PLB 2800) is a highly integrated
and configurable Layer 2+ SoC (Switch-on-a-Chip).
It extends Infineon's Layer 2 Ethernet switch family
of products for higher integration, and more
advanced traffic management. The Purple鈥檚 versa-
tile configuration and stacking options permit a
variety of system topologies designed to increase
the deployment of Ethernet access applications.
The Purple features a large on-chip packet buffer
and address tables. With the addition of an on-chip
64-bit MIPS CPU, the need for an external memory
and controller is eliminated.
Advanced security and Quality of Service (QoS)
features are guaranteed using extensive VLAN
management capabilities and port-based security
for guarded and secure handling of traffic flows.
The Purple supports seven different configura-
tions, ranging from eight GbE ports up to
48FE + 2GbE.
Applications
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Ethernet access switch for
IP-DSLAM/DLC/MDU/MTU
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High port count workgroup switch
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GbE aggregator Ethernet Switch
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Cellular base stations
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Packet over SONET/SDH
systems
Features
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21 Gbit/s 12 million packets/
second switching engine for solid
L2+ wirespeed switching
performance
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Embedded 64-bit MIPS 5Kc CPU
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On-chip DRAM, SRAM
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Stackable with up to 16 Purple
switches with complete stack
management
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Four Class of Service (CoS)
queues per port
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Strict priority and Weighted-Fair-
Queuing (WFQ) packet
scheduling
Advanced buffer control
Broadcast and multicast storm
control
Multicast support for up to
256 multicast groups
Port based flow control
Per-flow token bucket policing
Per-queue rate shaping
Port, tag and flow-based VLANs
Stacked VLAN support
Port-based security
Intrusion detection
eCPU switch management with
Bus mastering capabilities, flow-
based accounting and RMON
support
Hardware assistance for protocols
such as STP, GVRP and IGMP
and Snooping
Interfaces
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SMII V1.2/V2.1 for FE ports
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(R)GMII/TBI/MII for GE ports
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32-Bit, 66 MHz PCI or generic
host bus with DMA support
2
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I C Interface for configuration
EEPROM, optional low-cost CPU
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PC-133 SDRAM interface for
external CPU DRAM
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EJTAG Interface for testing
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General purpose timer and I/Os
Standards Supported
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Supports a wide variety of IEEE
802.xx protocols
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IETF RFCs 1155鈥?157 SNMP
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IETF RFCs 1213, 1643, 1493
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IETF RFC 1757 RMON
Physical Characteristics
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P-BGA-388-2 package
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Core logic operates at 1.8 V
Purple
48FE+2GbE/8GbE L2+
Configurable Ethernet
Switch-on-a-Chip
PLB 2800
N e v e r
s t o p
t h i n k i n g .
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英文版
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