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鈥?Power off disable outputs permit 鈥渓ive insertion鈥?/div>
鈥?Typical V
OLP
(Output Ground Bounce) < 1.0V
at V
CC
= 5V, T
A
= 25擄C
PI74FCT162841T Features:
鈥?Balanced output drivers: 鹵24 mA
鈥?Reduced system switching noise
鈥?Typical V
OLP
(Output Ground Bounce) < 0.6V
at V
CC
= 5V, T
A
= 25擄C
1
2
Product Description:
Pericom Semiconductor鈥檚 PI74FCT series of logic circuits are pro-
duced in the Company鈥檚 advanced 0.8 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT16841T and PI74FCT162841T are 20-bit wide
transparent latches designed to provide temporary storage of data
and can be used as I/O ports, memory address latches, and bus
drivers. The Output Enable and Latch Enable controls allow the
devices to be operated as two 10-bit latches or one 20-bit latch.
Signal pins are arranged in a flow-through organization for ease of
layout and hysteresis is designed into all inputs to improve noise
margin.
The output buffers on the PI74FCT16841T and PI74FCT162841T
are especially designed for driving high-capacitance loads and low
impedance backplanes and include a Power-Off Disable function
allowing 鈥渓ive insertion鈥?of boards when the devices are used as
backplane drivers.
The PI74FCT162841T has 鹵24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
3
4
5
6
7
8
9
Logic Block Diagram
1
OE
1
LE
1
D
1
2
OE
2
LE
10
D
C
2
Q
1
D
C
1
Q
1
2
D
1
11
12
13
To 9 other channels
To 9 other channels
14
15
1
PS2078A 01/15/95
1
2
3
4
5
6
