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PI74FCT162646T Datasheet

  • PI74FCT162646T

  • Fast CMOS 16-Bit Registered Transceivers

  • 219.08KB

  • 8頁

  • PERICOM   PERICOM

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PI74FCT16646T
PI74FCT162646T
PI74FCT162H646T
Fast CMOS 16-Bit
Registered Transceivers
Product Features
Common Features:
聲 PI74FCT16646T, PI74FCT162646T, and PI74FCT162H646 are
high-speed, low power devices with high current drive
聲 V
CC
= 5V 鹵 10%
聲 Hysteresis on all inputs
聲 Packages available:
聳 56-pin 240 mil wide plastic TSSOP (A)
聳 56-pin 173 mil wide plastic TVSOP (JEDEC TSSOP K)
聳 56-pin 300 mil wide plastic SSOP (V)
PI74FCT16646T Features:
聲 High output drive: I
OH
= 聳32mA; I
OL
= 64mA
聲 Power off disable outputs permit 聯(lián)live insertion聰
聲 Typical V
OLP
(Output Ground Bounce)
< 1.0V at V
CC
= 5V, T
A
= 25擄C
PI74FCT162646T Features:
聲 Balanced output drivers: 鹵24mA
聲 Reduced system switching noise
聲 Typical V
OLP
(Output Ground Bounce)
< 0.6V at V
CC
= 5V, T
A
= 25擄C
PI74FCT162H646T Features:
聲 Bus Hold retains last active bus state during Three-state
聲 Eliminates the need for external pull-up resistors
Product Description
Pericom Semiconductor聮s PI74FCT series of logic circuits are
pro duced in the Company聮s advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT16646T, PI74FCT162646T, and PI74FCT162H646
are 16-bit registered transceivers organized as two independent
8-bit bus transceivers designed with 3-state D-type flip-flops and
control circuitry arranged for multiplexed transmission of data
directly from the data bus or from the internal storage registers. Each
8-bit transceiver utilizes the enable control (xOE) and direction pins
(xDIR) to control the transceiver functions. The Select (xSAB and
xSBA) control pins are used to select either real-time or stored data
transfer. The circuitry used for select control will eliminate the
typical decoding glitch that occurs in a multiplexer during the
transition between real-time and stored data. A low input level
selects real-time data and a high selects stored data.
The PI74FCT16646T output buffers are designed with a Power-Off
disable allowing 聯(lián)live insertion聰 of boards when used as backplane
drivers.
The PI74FCT162646T has 鹵24mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
The PI74FCT162H646T has 聯(lián)Bus Hold聰 which retains the input聮s
last state whenever the input goes to high-impedance preventing
聯(lián)floating聰 inputs and eliminating the need for pull-up/down resistors.
Logic Block Diagram
1
OE
1
DIR
1
CLKBA
1
SBA
1
SAB
1
CLKAB
2
OE
2
DIR
2
CLKBA
2
SBA
2
SAB
2
CLKAB
B REG
D
C
1
A0
B REG
D
C
1
B0
2
A0
A REG
D
C
A REG
D
C
2
B0
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
1
PS2039B
02/24/99

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