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PI74AVC+16374
2.5V 16-Bit Edge Triggered D-Type
Flip-Flop with 3-State Outputs
Product Features
聲 PI74AVC+16374 is designed for low voltage operation,
V
CC
= 1.65V to 3.6V
聲 True 鹵24mA Balanced Drive @ 3.3V
聲 Compatible with Philips and T.I. AVC Logic family
聲 I
OFF
supports partial power-down operation
聲 3.6V I/O Tolerant inputs and outputs
聲 All outputs contain a patented DDC
(Dynamic DriveControl) circuit that reduces noise without
degrading propagation delay.
聲 Industrial operation at 聳40擄C to +85擄C
聲 Available Packages:
聳 48-pin 240-mil wide plastic TSSOP
聳 48-pin 173-mil wide plastic TVSOP
Product Description
Pericom Semiconductor聮s PI74AVC+ series of logic circuits are
produced using the Company聮s advanced submicron CMOS
technology, achieving industry leading speed.
The PI74ALVCH16374 is particularly suitable for implementing
buffer registers, I/O ports, bidirectional bus drivers, and working
registers. This device can be used as two 8-bit flip-flops or one
16-bit flip-flop. On the positive transition of the Clock (CLK) input,
the Q outputs of the flip-flop take on the logic levels set up at the
data (D) inputs. OE can be used to place the eight outputs in either
a normal logic state (high or low logic levels) or a high-impedance
state. In that state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and the increased drive
provide the capability to drive bus lines without need for interface
or pullup components. OE does not affect internal operations of the
flip-flop. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
Logic Block Diagram
1OE
1
1CLK
48
C1
2
1Q1
1D1
47
1D
To Seven Other Channels
24
2OE
2CLK
25
C1
13
2Q1
2D1
36
1D
To Seven Other Channels
1
PS8527
03/01/01