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PI74ALVTC16820
Product Features
聲 PI74ALVTC16820 is designed for low-voltage operation,
V
DD
= 1.65V to 3.6V
聲 Supports Live Insertion
聲 3.6V I/O Tolerant Inputs and Outputs
聲 Bus Hold
聲 High Drive, 聳32/64mA @ 3.3V
聲 Uses patented noise reduction circuitry
聲 Power-off high impedance inputs and outputs
聲 Industrial operation: 聳40擄C to +85擄C
聲 Packages available:
聳 56-pin 240-mil wide plastic TSSOP (A)
聳 56-pin 173-mil wide plastic TVSOP (K)
Product Description
2.5V 10-Bit Flip-Flop with
Dual and 3-State Outputs
Pericom Semiconductor聮s PI74ALVTC series of logic circuits are
produced using the Company聮s advanced 0.35 micron CMOS
technology, achieving industry leading speed.
The PI74ALVTC16820, a 10-bit flip-flop designed for 1.65V to 3.6V
V
CC
operation, offers edge-triggered D-type flip-flops. On the
positive transition of clock (CLK) input, the device provides true
data at the Q outputs.
A buffered output-enable (OE) input can be used to place the ten
outputs in either a normal logic state (HIGH or LOW level) or a high-
impedance state in which outputs neither load nor drive the bus
lines significantly. This high-impedance state and increased drive
provide drive bus lines without interface or pullup components.
OE does not affect the internal operation of the flip-flops. Old data
can be retained or new data can be entered while the outputs are in
the high-impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor whose
minimum value is determined by the current sinking capability of
the driver.
To prevent 聯(lián)floating聰 inputs and to eliminate pullup/down resistors,
the family offers both I/O Tolerant, which allows it to operate in
mixed 1.65/3.6V systems, and 聯(lián)Bus Hold,聰 which retains the data
input聮s last state.
Logic Block Diagram
1
OE
1
2
OE
28
2
C
1
1
D
CLK
56
55
1
Q
1
D
1
3
1
Q
2
TO 9 OTHER CHANNELS
1
P0.2
04/09/02
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