21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVTC16721
2.5V 20-Bit Flip-Flop
with 3-State Outputs
Product Features
聲 PI74ALVTC16721 is designed for low voltage operation,
V
DD
= 1.65V to 3.6V
聲 Supports Live Insertion
聲 3.6V I/O Tolerant Inputs and Outputs
聲 Bus Hold
聲 High Drive, 聳32/64mA @ 3.3V
聲 Uses patented noise reduction circuitry
聲 Power-off high impedance inputs and outputs
聲 Industrial operation at 聳40擄C to +85擄C
聲 Packages available:
聳 56-pin 240-mil wide plastic TSSOP (A56)
聳 56-pin 173-mil wide plastic TVSOP (K56)
Product Description
Pericom Semiconductor聮s PI74ALVTC series of logic circuits are
produced using the Company聮s advanced 0.35 micron CMOS
technology, achieving industry leading speed.
The PI74ALVTC16721 is a 20-bit flip-flop with 3-state outputs
designed specifically for 1.65V to 3.6V V
DD
operation. The device
is designed with edge-triggered D-type flip-flops with qualified
clock storage. On the positive transition of clock (CLK) input, the
device provides true data at the Q outputs, provided that the clock-
enable (CLKEN) input is LOW. If CLKEN is HIGH, no data is stored.
A buffered output-enable (OE) input can be used to place the
20 outputs in either a normal logic state (HIGH or LOW level) or a
high-impedance state. In the high-impedance state, the outputs
neither load nor drive the bus lines significantly. The high-impedance
state and increased drive provide the capacity to drive bus lines
without the need for interface or pullup components. OE does not
affect the internal operation of the flip-flops. Old data can be
retained or new data can be entered while the outputs are in the high-
impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
DD
through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
The family offers both I/O Tolerant, which allows it to operate in
mixed 1.65/3.6V systems, and "Bus Hold," which retains the data
input聮s last state preventing "floating" inputs and eliminating the
need for pullup/down resistors.
Logic Block Diagram
1
56
29
2
55
1
PS8617
06/05/02