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Packages available:
聳 96-ball, 13.5mm x 5.5mm x 1.4mm low profile fine
pitch ball grid array, LFBGA (NB)
Product Description
Pericom Semiconductor聮s PI74ALVCH series of logic circuits are
produced using the Company聮s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
This 32-bit edge-triggered D-type flip-flop is designed for 2.3V to
3.6V V
CC
operation.
The PI74ALVCH32374 is particularly suitable for implementing
buffer registers, I/O ports, bidirectional bus drivers, and working
registers. This device can be used as four 8-bit flip-flops or two
16-bit flip-flops or one 32-Bit flip-flop. On the positive transition of
the Clock (CLK) input, the Q outputs of the flip-flop take on the logic
levels set up at the data (D) inputs. OE can be used to place the eight
outputs in either a normal logic state (high or low logic levels) or a
high-impedance state. In that state, the outputs neither load nor
drive the bus lines significantly. The high-impedance state and the
increased drive provide the capability to drive bus lines without
need for interface or pullup components. OE does not affect internal
operations of the flip-flop. Old data can be retained or new data can
be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
Logic Block Diagram
1OE
A3
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
2OE
H3
1CLK
A4
2CLK
H4
C1
A2
C1
1Q1
2D1
E2
E5
2Q1
1D1
A5
1D
1D
To Seven Other Channels
J3
To Seven Other Channels
T3
3OE
3CLK
4OE
4CLK
J4
T4
C1
J2
C1
3Q1
4D1
N2
N5
4Q1
3D1
J5
1D
1D
To Seven Other Channels
To Seven Other Channels
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PS8439
10/14/99
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