鈥?/div>
PI74ALVCH16244 is designed for low-voltage operation
V
CC
= 2.3V to 3.6V
Hysteresis on all inputs
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25擄C
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25擄C
Bus Hold retains last active bus state during 3-State,
eliminating the need for external pullup resistors
Industrial operation at 聳40擄C to +85擄C
Packages available:
聳 48-pin 240 mil wide plastic TSSOP (A)
聳 48-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductor聮s PI74ALVCH series of logic circuits
are produced using the Company聮s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The PI74ALVCH16244 is an non-inverting 16-bit buffer/driver
designed for low-voltage 2.3V to 3.6V V
CC
operation.
The buffer/driver is designed specifically to improve both the
performance and density of 3-State memory address drivers, clock
drivers, and bus-oriented receivers and transmitters.
The device can be used as four 4-bit buffers, two 8-bit buffers, or
one 16-bit buffer. It provides inverting outputs and symmetrical
active-low output-enable (OE) inputs.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor in which
the minimum value is determined by the current-sinking capability
of the driver.
The PI74ALVCH16244 has 聯(lián)Bus Hold聰 which retains the data
input聮s last state whenever the data input goes to high-impedance
preventing 聯(lián)floating聰 inputs and eliminating the need for pullup/
down resistors.
Logic Block Diagram
1OE
1A1
1
47
2
3OE
1Y1
3A1
25
36
13
3Y1
1A2
46
3
1Y2
3A2
35
14
3Y2
1A3
44
5
1Y3
3A3
33
16
3Y3
1A4
43
6
1Y4
3A4
32
17
3Y4
2OE
2A1
48
41
8 2Y1
9
4OE
4A1
24
30
19
4Y1
2A2
40
2Y2
4A2
29
20
4Y2
2A3
38
11
2Y3
4A3
27
22
4Y3
2A4
37
12
2Y4
4A4
26
23
4Y4
1
PS8087B
07/28/00
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